AD 740597
RADC-TR-72-6
Final Technical Report
February 1972
NUMERICAL SAMPLING TECHNIQUES INVESTIGATION
Texas Instruments, Inc.
Approved for public release;
distribution unlimited.
Roproducod by
NATIONAL TECHNICAL
INFORMATION SERVICE
5pfing11old/ Va 22151
D D C
onpQEJ
APR 21 1972
istsinns
B
Rome Air Development Center
Air Force Systems Commend
Griffiss Air Force Bose, New York
UNCLASSIFIED
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DOCUMENT CONTROL DATA ■ R & D 1
(Sacurlly clma ai f leaf ion ol titla, body o / mbatrect and Indexing annotation muxt be anrarod whan tha ovarall raporl la claaaillad) j
1 originating activity (Corporal* author)
Texas Instruments, Inc.
Digital Systems Division
P.0. Box 2909, Austin TX 78767
2«. REPORT SECURITY C L A SSI F 1 C A T1 ON
UNCLASSIFIED
2tGH ° UP N/A
I REPORT TITLE
NUMERICAL SAMPLING TECHNIQUES INVESTIGATION
4. DESCRIP Ti vc NOTH (Typa of taport and Inctualva dataa)
Final July 1970 - August 1971
5- authonih (flral nama, mlddla Initial, laal namt)
Dr. Alan L. McBride
Dan K. Raley
t REPORT DATE
February 1972
fa. total no. op paces
112
7b. NO. OP REPS
26
•«, CONTRACT OR GRANT NO-
F30602-70-C~0l80
Job Order No. U5190000
SJ. ORIGINATOR'S REPORT N-jMBERIS]
UI-978101-F
Ob. OTHER REPORT NO(S) (Any other numbera that may ba aaaignad
thla raport)
RADc-TR-72-6
10 DISTRIBUTION STATEMENT
Approved for public release; distribution unlimited.
11. SUPPLEMENTARY NOTES
None
12. SPONSORING MILITARY ACTIVITY
Rome Air Development Center (CORS)
Oriffiss Air Force Base, New York 13M0
1*. ABSTRACT
This report is devoted to the investigation of techniques for implementing an
all digital oscillator and the applications of this oscillator in communication
equipment. Two techniques of implementing the digital oscillator are discussed:
the recursive technique which uses recursive difference equations as the oscilla¬
tor algorithm and the nonrecursive technique which uses permanently stored values
of sine waves and corresponding control logic to generate output sine waves. The
nonrecursive implementation approach was selected for breadboard design. Bread¬
board design, construction and performance evaluation are considered. The oscilla¬
tor operates ilf two modes: as a frequency synthesizer and a digitalized voltage
controlled oscillator (VCO). Applications of these two modes in communication
function implementations are presented as well as a new technique for implementing
digitalized FM demodulation.
DD /T J473
UNCLASSIFIED
Security Classification
f
UNCLASSIFIED
Securityclassification
kky WORDS
Digital Oocillator
Communication Systems
Demodulator
Phase-Locked Loop
Discriminator
In-Phase and Quadrature Sampling
Nonlinear Estimation
Digital Filtering
\
\
UNCLASSIFIED
Security Classification
NUMERICAL SAMPLING TECHNIQUES INVESTIGATION
Dr. Alan L, McBride
Oan K. Raley
Texas Instruments, Inc.
Approved for public release;
distribution unlimited.
FOREWORD
This final report was prepared by Dr. Alan L. McBride (Project
Manager) and Mr. Dan K. Raley of the Advanced Development Staff, Digital
Systems Division, Texas Instruments, Ine., Austin, Texas. The work vas
peformed under contract F30602-70-C-0180, Job Order Number 1*5190000, for
Rome Air Development Center, Griffiss Air Force Base, New York. The re¬
port covers the period from July 1970 to August 1971. RADC Project
Engineer is Mr. Charles N. Meyer (CORS). Secondary report number iB
UI-978101-F.
This report has been reviewed by the Information Office (01) and
is releasable to the National Technical Information Service (NTIS).
This technical report has been reviewed and is approved.
Approved: l W
CHARLES N. MEYER y
Effort Engineer
ColoneTTuSAF
Communications 8 Navigation Division
FOR THE COMMANDER:
FRED I. DIAMOND
Acting Chief, Plans Office
ii
ABSTRACT
This report.is devoted tn the investigation o£ techniques for implementing an
all digital oscillator and trie applications of this oscillator in communication
equipment. Two techniques of implementing the digital oscillator are dis¬
cussed: The recursive technique which uses recursive difference equations
as the oscillator algorithm and the nonrecursive technique which uses perma¬
nently stored values of sine waves and corresponding control logic to generate
output sine waves. The nonrecursive implementation approach was selected
for breadboard design. Breadboard design, construction and performance
evaluation are considered. The oscillator operates in two modes; as a fre¬
quency synthesizer and a digitalized voltage controlled oscillator (VCO).
Applications of these two modes in communication function implementations
are presented as well as a new technique for implementing digitalized FM de¬
modulation.
EVALUATION
This study was concerned with the investigation of techniques
for implementing an all-digital oscillator and the applicates
of this oscillator in communication equipment. Two basic t^umiques
for synthesizing digital oscillators have been discussed. The
first, the recursive technique, resulted from the difference
equations relating input and output. The error build-up from this
approach could not be satisfactorily coped with and consequently,
this means was discarded. The second method was the non-recursive
technique, using a read only memory. All things considered the non-
recursive technique for digital synthesis of oscillators has been
shown to operate as well, if not better, than conventional
analog circuits in the basic configurations, frequency synthesizer
and VCD replacement.
In the course of the study it developed that a particular
digital oscillator application, a non-linear demodulator, appears to
be capable of providing a near-optimum threshold extension technique
for digitalized EM receivers. This idea appears to merit further
investigation.
CHARLES N. MEYER
Effort Engineer
lv
TABLE OF CONTENTS
i
t
i
Section
I INTRODUCTION
A. General 1
2
B. Outline of the Report
1. Implementation Approaches - Section II
2. Applications of Digital Oscillator - Section III 2
3. Breadboard Design Discussion - Section IV 2
4. Breadboard Demonstration Evaluation - Section V 3
5. Conclusions - Section VI 3
6. In-Phase and Quadrature Sampling - Appendix A 3
7. A Non Linear Digital Processor For FM
Demodulation - Appendix B 3
II IMPLEMENTATION APPROACHES 5
A. Recursive Digital Oscillator
1. General
2. Error Analysis
3. Error Correction Techniques
B. Nonrecursive Digital Oscillator
1. General
2. Fourier Analysis
3. Error Analysis
III APPLICATION OF DIGITAL OSCILLATORS 21
A. Introduction
B. Digitalized Phase - Locked Loops
1. Introduction
2. Digitalized Loop
C. Recursive Nonlinear Demodulator (RNLD)
1. Introduction
2. RNLD Synthesis
3. Single-Pole Filter Example
D. Discrete Fourier Transformations
E. Synchronization
23
23
24
25
25
27
33
37
37
5
5
8
10
13
13
15
16
v
TABLE OF CONTENTS (Continued)
Section
Page
IV
BREADBOARD DESIGN DISCUSSION
41
A, General
41
B. Breadboard Configurations
43
1.
Frequency Synthesizers
43
a,
Frequency Synthesizer
43
b.
Frequency Translator
43
2.
VCO Replacements
44
a.
Tracking Filter
44
b.
Frequency Modulator
44
C. Breadboard Description
46
I.
Mechanical Description
46
2.
Operational Description
46
a.
Digital Portion
46
1) Recursive Adder Board (Board E)
46
2) DAC Board F
48
3) Buffer Board I
48
4) Modulation Board D
48
5) ADC Converter Board C
48
6) BCD/Binary Converter Board B
48
7) Clock Board A
51
b.
Analog Portion
51
1) Mixer Board G
51
2) Discriminator Board H
51
V
BREADBOARD DEMONSTRATION AND EVALUATION
53
A. Demonstration
53
i.
Frequency Synthesizers
53
a.
Frequency Synthesizer
53
b»
Frequency Translator
54
2.
VCO Replacement
54
a.
Frequency Modulation
54
b.
Tracking Filter
55
vi
TABLE OF CONTENTS (Continued)
Section Page
B, Evaluation 56
1. Frequency Synthesizers 57
a. Stability 57
b. Harmonic Distortion 58
c. Harmonic Content 58
2. VCO Replacement 60
a. Frequency Linearity 61
b. Amplitude and Frequency Stability 61
c. Pull-In Range 61
d. Harmonic Distortion and Harmonic
Content 61
e. Application Analysis 6l
1) Angle Modulation 61
2) Frequency Shift Keying (FSK) 64
VI CONCLUSIONS 65
A. Summary 65
B. Recommendations 66
APPENDIX A In-Phase and Quadrature Sampling 69
APPENDIX B A Nonlinear Digital Processor for FM Demodulation ?9
vi i
LIST OF ILLUSTRATIONS
Figur e Title Page
2-1 Coupled Recursive Digital Oscillator 6
2-2 Uncoupled Recursive Digital Oscillator 7
2-3 Simplified Recursive Digital Oscillator 7
2-4 Error Correction Filter Applied to Cosine Generator H
2-5 Phase Circle *4
2-6 Spectral Analysis for f Q /f s Ratio of 1/l 1.2
1 - 1 Spectral Analysis for f Q /f fl Ratio of 1/l7. 3 18
2- 8 Spectral Analysis for f Q /f s for Ratio of 1/22.5 19
3- 1 Linearized Phase - Locked Loop Block Diagram 23
3-2 Linearized Digital Phase - Locked Loop 25
3-3 Digitalized Phase - Locked Loop Block Diagram 26
3-4 Block Diagram for Modulator and Demodulator for an FM
Process 28
3-5 Block Diagram for Equivalent Baseband FM Process 28
3-6 Single Pole Message Model 29
3-7 Model for FM 30
3-8 Continuous State Variable Representation of FM Process 30
3-9 Block Diagram of the Message Process Illustrating Discrete
State Variable Characterization of the Angle G(K) 32
3-10 Block Diagram Realization of the Recursive Nonlinear
Demodulation for a Single-Pole Message Filter 34
3-11 Signal-to-Noise Performance Curves Obtained from
Simulation 36
3-12 Block Diagram Showing the Different Time Waveforms Going
from Digital to Analog Processing When Using the Digital
Oscillator 38
3- 13 Block Diagram Showing the Application of a Digital Oscillator
to Obtain Timing Marks for Bit Synchronization 39
4- 1 Nonrecursive Digital Oscillator Block Diagram 41
4-2 Frequency Synthesizer 43
4-3 Frequency Translator 44
4-4 Tracking Filter 45
4-5 Frequency Modulator 45
4-6 Breadboard Mechanical Package 47
4-7 Breadboard Digital Layout 49
4- 8 Analog Layout 52
5- 1 Frequency Synthesizer 53
5-2 Frequency Translation 54
5-3 FM Synthesizer 55
5-4 Tracking Filter 56
5-5 DO Stability Measurement 57
viii
LIST OF ILLUSTRATIONS (Continued)
Figure
Title
Page
5-6
Stability Comparison
58
5-7
% Distortion vs Frequency lor Digital Oscillator
59
5-8
DO Spectrum for Input Frequency of 186. 413 Hz
60
5-9
Af vs Voltage FM Mode Digital Oscillator
62
5-10
Density Function of Sinusoid of Peak "a"
63
5-11
Frequency Spectrum for VCO Configuration
63
5-12
FSK Application of DO
64
LIST OF TABLES
Table
T itle
Page
I
Number of Output Samples Obtainable for a Desired SNR
10
II
Digital Oscillator Applications
21
ix
SECTION 1
INTRODUCTION
A. GENERAL
The advent of Large Scale Integration (LSI) techniques have made many
of the communication functions previously performed by analog techniques
amenable to digital implementation. This idea when combined with the ver-
sability of digital components precipitated this contract, entitled "Sampling
Numerical Techniqv.as" investigation, directed toward evaluation of techni¬
ques for implementing digital oscillators,
A digital oscillator is a device which produces discrete quantized In-
bits) samples of a sinusoidal waveform at some fixed sample rate. There are
basically two methods for generating samples in an all digital oscillator - re¬
cursively and nonrecursvvely. Recursive digital oscillators result from an
examination of the different equations relating sinusoidal outputs to previously
computed outputs. These different equations are obtained by applying Z-trans-
formation techniques to the Laplace transform of an oscillator output (either
sine or cosine). Problems are encountered when a digital oscillator is im¬
plemented recursively; the round-off errors associated with each iteration
tend to build up and become unbounded, therefore requiring some type error
compensation.
The nonrecursive digital oscillator approach, on the other hand, does
not have this inherent error build-up. This approach requires that n-bit sam¬
ples for one cycle of the sinusoid be stored in a memory, generally a read¬
only memory (ROM). Since it is physically impossible to store every sample
value for one cycle of a sinusoid in a finite size ROM, M equally spaced sam¬
ple values of the waveform are stored. This M-word quantization and the n-
bit discretization of the sampled waveform (sample values stored in an Mxn
ROM) are the two sources of amplitude error for the nonrecursive digital
oscillator. These errors however do not build up and are constant for each
M and n combination.
The choice of which approach to employ in implementing a digital oscil¬
lator is usually dictated by the particular application of the oscillator. For
example, a nonrecursive digital oscillator which uses a ROM in conjunction
with shift registers and simple control circuitry can be used to obtain output
waveforms in the neighborhood of 10 MHz using standard techniques. These
relatively high sample rates cannot be achieved using the recursive digital
oscillator approach implemented with similar logic. However, the recursive
digital oscillator under some conditions requires less logic and might be pre¬
ferred if high sample rates are not required.
1
D. OUTLINE OF THE REPORT
1. IMPLEMENTATION APPROACHES - SECTION II
The digital oscillator using the recursive approach is discussed first. It
is shown that the major difficulty encountered when using this approach is the
computational build up error. Two recursive digital oscillators are discussed
and their build-up errors evaluated. This evaluation indicates that neither
recursive digital oscillator configuration is practical unless this build-up er¬
ror is corrected. Three techniques for correcting this error are discussed.
The nonrocursive approach to digital oscillator design is then discussed.
The amplitude errors for this approach are shown to be fixed and completely
determinable for each' ROM word size versus bit size (Mxn) combination. The
frequency errors result from quantization of the ratio of the synthesized fre¬
quency to the sample frequency and are shown to be independent of the (Mxn)
combinations. Fourier analysis of various synthesized waveforms are then
performed with the results presented,
2. APPLICATIONS OF DIGITAL OSCILLATORS - SECTION HI
An important part of this effort has been determining those communica¬
tion functions which could employ digital oscillators and evaluating their re¬
spective performances. This section presents the configurations for the digi¬
tal oscillator approaches. There are essentially two basic configurations in
which digital oscillator can function: as a frequency synthesizer, or as a
digitalized voltage controlled oscillator (VCO). The nonracursive digital os¬
cillator approach is directly amenable to these two configurations. The re¬
cursive approach on the other hand can not be used in the variable frequency
(VCO) configuration because of the difficulty involved in changing the coeffi¬
cients of the recursive equations. This does not, however, prevent this ap¬
proach from being used in the frequency synthesizer configuration.
For the above mentioned reasons, this section is devoted to nonrecursive
digital oscillator configurations. These configurations include digitalized
phase-locked-loop demodulation, linear frequency and angle modulation, dis¬
crete Fourier transformation, synchronization, and a new technique called
the recursive nonlinear demodulator. This demodulator results from the ap¬
plication of nonlinear filtering and estimation techniques to angle demodulation,
and by its very nature provides near-optimum threshold extension (FM). The
performance evaluations for these configurations are included in a later sec¬
tion.
3. BREADBOARD DESIGN DISCUSSION - SECTION IV
This section presents the basic design considerations for the nonrecui-
sivs digital oscillator configurations; i.e. , frequency synthesizer, and voltage
controlled oscillator. Also included are descriptions of the mechanical pack-
age and the operational procedure.
4. BREADBOARD DEMONSTRATION'S EVALUATION - SECTION V
To effectively evaluate a digital oscillator which outputs digital samples
of a sinusoid, these samples must first be converted to analog by digital-to-
analog conversion techniques so that a direct comparison can be made with
analog waveforms. The breadboard evaluation discussed in this section is
based upon making these comparisons with conventional equipment.
5. CONCLUSIONS - SECTION VI
This section contains a summary of the impo tant results obtained during
the study effort and a recap of the performance evaluation for the breadboard.
Algo included are Texas Instruments' recommendations for further efforts in
this area.
6. IN-PHASE AND QUADRATURE SAMPLING - APPENDIX A
The in-phase and quadrature sampling idea is used throughout the report.
This appendix contains the derivation of this concept for both coherent and
noncoherent sampling.
7. A NONLINEAR DIGITAL PROCESSOR FOR FM DEMODULATION -
APPENDIX B
This appendix gives a discussion of the synthesis and evaluation of a
special type of digitalized FM demodulator that makes use of the digital os¬
cillator. A brief discussion of the same topic is also presented in Section III.
3/(4 blank)
SECTION II
IMPLEMENTATION APPROACHES
i
i
A. RECURSIVE DIGITAL OSCILLATOR
1. GENERAL
The technique used in the recursive digital oscillator has been discussed
extensively in references 1, 2, 3 and in the simplest form can he expressed
trigonometrically as:
cos (m+l)8 => cos mGcosG - sin mfi sin0
sin (m+l)0 = sin m0cos8 + cos mB sinG ^
where the (m+l)th sine and cosine terms are computed recursively
from the last terms and some initialization terms. The recursive relations
of equation (1) expressed in block diagram form are shown in Figure 2-1.
These expressions for cos (m+l)6 and sin (m+l)0, although trigonometri¬
cally correct, lead to severe errors when computed on finite bit computers.
The problem arises because each output, cos (m+l)8 and sin (m+l)G, is used
to compute the next output. This type of recursive relation is very undesir¬
able because of the error build up.
An alternate method for recursively computing sine and cosine values is
based on the application of the z-tranoiorm to an oscillator output; i, e. ,
sot) =
1 - cosaTz" 1
1 - ZcoBalz ^
-t
+ z
( 2 )
r
where T is the sample interval.
These z-transforms could be considered as transfer functions of a system,
1 • © • f
H (z)
c
H (z)
s
1 - cosoTz
1 - 2cosoTz * + z
_ sinoTz *
1 - 2cosoTz ^ + z
(3)
5
Figure 2-1. Coupled Recursive Digital Oscillator
where H c (z) represents a system which outputs a cosine function and H B (z)
likewise a sine function. The configurations for equation (3) are shown in
Figure 2-2,
A method requiring fewer arithmetic operations can be obtained by re¬
arranging the terms of equation (3); e, g. ,
H (z) =---:- - (1 - cosoTz *) = H(z) H 1 (z)
C . A pp, ■ 1 ““ C
1 - Zcoscvlz + z
H (z) =-----= sino-Tz" 1 = H(z) H' (z)
8 1 - 2cosaTz" + z 6
(4)
This configuration, shown in Figure 2-3, and the configuration of Figure
2-2 result from the same system function and will have identical outputs. The
advantage of the system shown in Figure 2-3 is that it is possible to illumi¬
nate the repetitious operations indicated by H(z). *
,; Tt should be noted, however, that the operations indicated by H^,(z) and H^(z)
can be eliminated by applying the appropriate initial conditions.
2. ERROR ANALYSIS
When finite word-length computers are used to simulate linear systems
(e. g. , digital filters), three types of errors are introduced. They are;
1) The error caused by discretization of the system parameters,
2) The error caused by analog to digital conversion of the input
signal.
3) The error caused by roundoff of the results.
Error 1) results in errors in the coefficients of the difference equations
and has been shown by Kaiser^ and Rader and Gold^ to effectively cause er¬
rors in the pole positions of the digital filter (or oscillator), This is an al¬
most intolerable error in a digital oscillator since a digital oscillator is stable
only when the poles are exactly on the unit circle. Rader and Gold demonstra¬
ted that for poles given by z^ 2 = r ex P (±j0'» the pole position errors are
Ar s*
AL
2r
AL AK
2rtan0 2r sin0
(5)
where L and K are the coefficients of the difference equation
y(nT) = Ky(nT - T) - Ly(nT - 2T) + x(nT) (6)
and AL and AK are the respective quantization errors. The errors in pole
positions are severe only when 0 is a small angle, In a digital oscillator this
corresponds to the case where the desired output frequency iB much smaller
than the sampling frequency.
The error 2) has been examined extensively but is of little consequence
in a digital oscillator since there is no input.
The error 3) has been shown^ to be dependent upon the type of represen¬
tation used to simulate the system. For a coupled system of the type shown
in Figure 2-1, the noise variance is shown to be
where E 0 is the digitalization error, 0 is as previously defined, and e = 1-r,
Therefore, if 0 gets small, o- ^ becomes very large. Likewise as r approaches
1, becomes infinitely large. For a system of the type in Figure 2-3,
8
(8)
cr n ^ is no longer dependent on 0, but still becomes instable for r equal to 1.
This same type analysis was performed for a digital oscillator where r is
equal to 1 with the following result, was found to be
(9)
where n is the number of iterations. Therefore, equation (9) indicates that the
noise increases linearly with iterations.
To get some indication of the number of samples obtainable before the
quantization noise becomes excessive, the signal-to-noise ratio as a function
of the number of bits retained and the number of samples obtained is investi¬
gated. From equation (9), it can be shown that the output signal-to-noise ratio
(SNR) is
SNR = -10 log 1()
dB
( 10 )
where E Q is the quantizing level and n is the number of samples obtained from
the oscillator. It should be under stood at the outset that the noise here is to be
thought of in an ensemble sense; any particular sample may or may not be in
error by an amount corresponding to the noise voltage. If it is deBired to be
sure that the signal output has less than a certain amount of noise disturbance,
it will be necessary to be rather conservative in estimating the number of sam¬
ples obtainable before the noise can exceed the desired level.
Suppose all levels in the oscillator are to be represented by 8-bit binary
numbers. Then E Q - 1/Z56 and
SNR = 59 - 10 Log 1() n dB
or
n =
10
59 - SNR
10
(ID
Table I shows the maximum number of samples obtainable before the ex¬
pected noise degradation will exceed certain levels.
9
1
Table I, Number of Output Samples Obtainable For A Desired SNR
Output SNR
(dB)
Number of Samples for
Oscillator of Figure 2-3
Number of Samples for
Oscillator of Figure 2-1
oT =45°
50
8
4
40
79
40
30
790
395
20
7, 900
3, 950
10
79,000
39,500
0
790,000
395,000
All noise caused by quantizi” 1 * to 8 bits.
3. ERROR CORRECTION TECHNIQUES
The use of an auxiliary storage device to hold the digits which are dis-
carded in computational quantization reduces the error caused by the itera¬
tive computations. In essence, this method, diagrammed in Figure 2-4, uti¬
lizes a digital filter, the input to which is the sequence of discarded digits
obtained from the quantizer Q, and the output from which is an error correc¬
tion term to be added to the regular output of the digital oscillator.
The expression in the z-domain for the quantizing error may be shown to
E(z) =
Q(g)
N
i + £ y J
i=i 1
( 12 )
where E(z) is the z-transform of the error in the oscillator output due to
quantizing, Q(z) is the z-transform of the quantizing error sequence itself,
and the bj are the coefficients of the denominator polynomial of H(z), the sys¬
tem transfer function, given by equation (4) for example. This equation can
be expressed in a nonrecursive form yielding
CO
e(nT) = J2 C - 9< nT - j T)
j = 0 J
(13)
10
ERROR CORRECTION FILTER
COSINE
,+ —-
DELAY
Figure 2-4. Error Correction Filter Applied to Cosine Generator
where the C.'s may be found
J
C ° = I ' V£ b ‘°j-* ,,4)
Theoretically, the filter must have a number of storage elements equal
to the number of samples to be obtained from the digital oscillator during one
run. If the digital oscillator must produce very many samples in one run then
the error correction filter may be impractically large.
When this same technique is applied to digital filters to aid in the correc¬
tion of quantization errors, it is found that the coefficients of the correction
filter form a sequence which converges to zero. Thus, it is necessary to store
only a certain number of the most recent quantization error values because
the correction filter has, for all practical purposes, a finite memory. Unfor¬
tunately, this is not the case for unstable filters or oscillators except for
special cases. The number of memory stages of the error correction filter
necessary to achieve a desired degree of accuracy depends on the relation¬
ship of the sampling frequency to the oscillator frequency as well as the quan¬
tizing level.
Another technique for reducing the effects of noise from all sources is to
periodically restart the oscillator from a point where the conditions are known
a priori very accurately. For example, if it is known that the kth sample out¬
put from the oscillator should correspond to the point on the sine wave of
sin 2 irn=0, then the oscillator may be restarted at the kth sample time with
the known initial condition.
For example, if T is the sampling period and T 0 is the oscillator period;
both expressed to some finite number of bits, then T/T 0 is a rational number
which may be expressed as the ratio of two integers simply by moving the
decimal (or binary) point to the right in both T and T 0 the same number of
places. Suppose
(15)
where a and b are both integers. Then bT = aT 0 and it is readily seen that
the bth sample time will correspond exactly to a multiple of the oscillator
time period. The oscillator may then be reset to itB initial conditions at the
bth sample time to remove any previously built-up error without incurring a
phase error because of the correction procedure itself. The smallest num¬
ber b, corresponding to the shortest possible time interval between resets,
may be found by making a and b relatively prime by extracting their greatest
common multiple by means of a simple algorithm. An additional technique
for error correction takes advantage of the trigonometric relationship be¬
tween a sine value and cosine value sampled at the same instant, i. e. ,
2 2
sin 0 + cos 6
( 16 )
At any iteration this relationship must hold, and any fluctuation is an indica¬
tion of amplitude error. The pole locations are fixed (quantized but fixed),
therefore the frequency is fixed. The amplitude of the oscillator pair may
therefore be adjusted by the scale factor.
12
SCALE =
yf-
(17)
2 2
sin 8 + cos 8
The inherent disadvantages of this scheme, however, make it very imprac¬
tical to use. The scale value itself is a very difficult computation to be per¬
formed in real-time, or even near real-time. Also the scale value corrects
amplitude variations, but not phase errors which also tend to vary widely as
more iterations are performed.
«
l
B. NONRECURSIVE DIGITAL OSCILLATOR
1. GENERAL
The nonrecursive digital oscillator algorithm generates sampled approxi¬
mations to a continuous sinusoid by selectively reading points from a read¬
only-memory (ROM). The approximations are generated as follows.
Let y(t) represent a continuous sinusoid of frequency f 0 , e. g,,
y(t) = cos 2rrf 0 t (18)
when expressed discretely, y(t) becomes
y(nAT) = cos 2nn f Q AT n = 0, 1, . . . (19)
= cos 2rrnf 0 /f e
where f B , the sample frequency, is at least twice f Q . The ratio f 0 /f B defines
some incremental step or arc around the phase circle, where the phase circle
is depicted in Figure 2-5. The quantity nf 0 /f B represents a complete history
of the steps taken around the phase circle. Assume now that the phase circle
is discretized into M equally spaced intervals (where M is 16 in Figure 2-5),
with a sinusoidal value stored in an ROM for each interval. For example the
value cos(o) would be stored in position (0000) of the ROM; similarly cos
(2 tt/M) = cos (tt/ 8) in position (0001). There are therefore M distinct sinu¬
soidal values stored in the ROM. *
An exact representation for y(nAT) is obtained only when an infinite num¬
ber of sample valuefe are stored in a ROM, This is obviously an impossibility.
Therefore, once an M is selected, all arguments for y(nAT) (i.e. , 2Trnf 0 /f 8 )
lying in an interval are approximated by the argument for that interval, where
*The storage requirement is somewhat simplified since only one quadrant of
the sinusoid is unique, therefore requiring only M/4 disctinct values in the
ROM.
13
( 0100 ) 2
(0101) (com y
JL M*> 1 6
4
(01 1 0 )
( 0010 )
(0111)
7r I (1000)
( 0001) 1
LOCATION ^'(0000)1 0,21T
( 1001 )
(1111).
ARGUMENT FOR
SINUSOID STORED
AT POSITION (0000)
IN ROM
( 1010 )
(1 1 10 ),
-2JL
(1 100) 3TT_.
2
Figure 2-5. Phase Circle
now the arguments 2Trnf 0 /f s are constrained to be always in the interval 0 to
2tt. (This iB accomplished simply by performing modulo 1 addition for the
quantity nf 0 /f s . ) The ROM position containing the stored sinusoidal value for
a particular interval is obtained by truncating the product Mnf 0 /f 8 , Since
nf o /f 0 is modulo 1, the quantity Mnf 0 /f s is modulo M. The truncation ensures
only integer values of the product since there are only integer positions in
the ROM.
The sinusoidal value extracted from the ROM for a particular n is there¬
fore given by;
•j
y(n&T) = cos “ [Mnf 0 /f s 3 (20)
A
where y denotes the estimate of y and the brackets indicate truncation and
modulo M addition. The quantity 2ir/M defines the basic phase increments
around the phase circle. The product 2 tt/M [Mnf 0 /f s ] therefore represents
the argument for the sinusoidal value stored at the [Mnf 0 /f e ] position in the
ROM.
2. FOURIER ANALYSIS
A continuous sinusoid of frequency f Q has a frequency spectrum composed
of two impulses, one at -f Q and one at +f 0 . The spectrum of a digital oscilla¬
tor should be the same, Fourier analysis is a tool for comparing the frequency
response of the nonrecursive digital oscillator estimate y(nAT) to the ideal
spectrum.
The output of the digital oscillator is assumed to be representable as a
series of impulse functions of period T, each impulse having as its magnitude
the value of the oscillator at that sample time; i. e. ,
y(t) =2 cos m [ M j f o /f sl 6(t ' jAT) (21)
j=o
where 6 is the Kronecker Delta, AT is the sample interval, and K is some
integer such that Kf 0 /f s is an integer. The selection of K ensures that the
output y(t) is periodic in T.
Using the usual definitions of the Fourier coefficients a n , b n , and a 0 ,
T
1 / 2irnt
a n = T / y(t) COS T~ dt
0
T
b n = T J y(t) sin ^^ dt ( 22 )
0
T
a o = T / y(t) dt
0
and inserting y(t) from equation (21), a n - V and a D become:
a
n
2t r _ _ . , _. 2 tt nt .
cos — [Mjf 0 /f a ] 6 (t - J AT) cos dt
T
cos
2tt
M
W 0 iS
cos
2Trn,iAT
T
(23).
15
1 /' 2
n = T / £ cos M - [ M 'V £ J 6(t " -> AT) 8i
0 j = °
= t £ cos If N V s £ ] ain - ?JTJS i~
T
r
K-l
/
E
J
0
j=0
K-l
E
COS
j=0
T
r
K-l
f
E
j
0
i-o
K-l
E
COS
j = 0
• 2 rent ,,
in —“ dt
( 23 )
o = T f S cos |f [Mjf 0 / a f] 6(t - jAT) dt
n j = °
2tt
M
The spectral components are obtained as
S
n
, 2 2 . 1/2
(a + b )
n n
This analysis has been performed for various f Q /f g ratios with a fixed
M of 256. Spectral plots for the ratios 1/11.2, 1/17.3, and 1/22. 5 are shown
in Figures 2-6, 2-7, and 2-8, respectively. The horizontal scale is norma¬
lized frequency; the vertical is normalized to 0 dB. The sidelobes for the
three cases are down at least 47 dB from the fundamental.
3, ERROR ANALYSIS
The truncation in the model for y(nAT) obviously causes errors in the
approximation to y(nAT). An upper bound may be placed on this error as fol ¬
lows: Let i represent the error introduced by the truncation; i. e. ,
2nnf 0 /f s - “J [Mnf 0 /f fl ] = <
or (24)
2*nf 0 /f s [Mnf 0 /f s ] +«
Taking the sine of both sides
sin 2irnf 0 /f e = sin [Mni 0 /f J + <}
2v 2 tt (25)
= sin — [Mnf 0 /f e ] cos e + cos — [Mnf 0 /f e ] sin «
16
ODBf-
O
—20DB
-40DBi
-140DB1_I_ 1 _l-I-I-I
1.0 2.0 3.0 4.0 5.0 6.0
NORMALIZED FREQUENCY
"f N
Figure 2-6. Spectral Analysis for f 0 /£ s Ratio of 1/11,2
Using the phase circle of Figure 2-5, the maximum error for a
particular M is
2tt
'max “ M
(26)
since the truncation can never result in an error of more than one interval.
For large values of M, (M > 64), cos (2tr/M) becomes very close to one. Us¬
ing this approximation,
17
ODB _
-20DB
-40DB
-60DB
-80 DB
-100DB-
-120DBH
— 140DET
I.'
2.0
3.0
4,0
3.0
6.0
Id NORMALI ZED FREQUENCY
' N
Figure 2-7. Spectral Analysis for f 0 /f g Ratio of 1/17, 3
3 TT gTT
sin 2irnf 0 /f 8 - sin — [Mnf 0 /f e ] = cos ■— [Mnf Q /f 8 ] sin {max (27)
The upper bound on the output error is obtained by realizing that
cos 2tt /M[Mnf 0 /f g] has a maximum value of one. This results in
j 8 in 2irnf o /f 0 - sin ~ [Mnf Q /f B ]| < sin s (28)
since for small ^x' sin Smax a (max .
18
normalized frequency
TN
Figure 2-8. Spectral Analysis for f Q / s Ratio of 1/22,5
Therefore, the absolute error in amplitude is bounded by the size of the
unit intervals around the phase circle (for large M). For the case of M = 256
the maximum error is 2ir/M = 2tt/256 = 0.0245, or 2.45 percent as a maxi¬
mum.
19/(20 blank)
SECTION III
APPLICATION OF DIGITAL OSCILLATORS
A. INTRODUCTION
Table II presents the two basic configurations in which a digital oscillator
can best function, frequency synthesizers and voltage controlled oscillator
(VCO) replacements, A comparison is made between the two implementation
techniques, recursive and nonrecursive, with pertinent commontB included
for each configuration.
Table II. Digital Oscillator Applications
Application Area
Comments
1. Frequency Synthesizers
a) Nonrecursive
ROM and arithmetic unit limits speed
to 10 MHz and below, but relatively
inexpensive to build
Shift register technique limited to 100
MHz, and has very high power re¬
quirement
b) Recursive
Pipeline techniques allow synthesis
to 7 MHz
Necessary arithmetic units expensive
and have high power consumption
Error correction a must
Cost approximately twice that of non¬
recursive synthesizer - not including
error correction
2. VCO Replacement
a) Nonrecursive
Hardware requirements the same as
those for frequency synthesizers
Constant phase throughout frequency
band
Instantaneous frequency variation
with no transient response
21
Table II. Digital Oscillator Applications (Continued)
Application Area
Comments
2. VCO Replacement
(Cont'd)
b) Recursive
Hardware requirements same
Constant phase
Error correction unnecessary in
locked loops
Requires calculation of coefficients
of difference equation for each fre¬
quency change
In frequency synthesizer applications, e. g, , conventional frequency syn¬
thesizers and frequency translators, synthesis above 1 MHz is possible with
either technique, but there are basic cost differentials and differences in
complexity.
For the VCO replacement applications, e. g. , frequency modulation and
tracking loops, there is no change in the logic configuration for the nonrecur¬
sive technique. However, the recursive technique requires constant modifi¬
cation of the coefficients of the difference equations describing the output;
these modifications effect the necessary frequency change seen at the output
when operating as a VCO. Another arithmetic unit must be included to pro¬
vide the coefficients for each new frequency; this additional unit implies even
more complexity for the recursive technique.
The problems encountered when implementing the recursive digital os¬
cillator, problems such as necessary error correction and computation of
difference equation coefficients for variable frequency applications, have led
to the elimination of the technique from consideration as an efficient useful
digital oscillator implementation procedure. Therefore, all applications dis¬
cussed in this section use nonrecursive digital oscillator configurations. These
applications include digitalized phase-locked loops, discrete Fourier trans¬
formations, synchronization, and a new technique, the recursive nonlinear
demodulator, called RNLD. A complete derivation of the RNLD, including
the solution of the filtering and estimation equations, is contained in Appen¬
dix B, The recursive nonlinear equations and simulation results are presented
in this section.
22
B,
DIGITALIZED PHASE-LOCKED LOOPS
1. INTRODUCTION
L
Phase-locked loops have been discussed extensively by Viterbi 0 and by
Gardner^; digitalized phase-locked loops by Larimore. ° This section exa¬
mines the possibility of using in-phase and quadrature sampling techniques9
coupled with a digital oscillator in a digital phase-lock loop. A second order
loop was designed as an example. The basic linearized phase-locked loop
block diagram is shown in Figure 3-1.
Figure 3-1. Linearized Phase-Locked Loop Block Diagram
This loop has a transfer function given by:
H(s)
6(3) _ KF(s) G(s)
6(?0 " 1 + KF(s) G(s)
(29)
Viterbi^
given by:
shows thaf for a perfect second order phase-locked loop,
F(s) is
F(s) = 1 i 1
s
(30)
which is simply a direct connection and an integrator with gain a. G(s) is sim¬
ilarly given as:
G(s) = -
s
(31)
a simple integrator.
23
Substituting equations (30) and (31) into (29) results in the following trans
fer function:
H(s)
K(s + a)
+ Ks + aK
(32)
Comparing this transfer function to the general expression for a second
order system, given by
U(b)
2 (» u> s + w
n n
2 2
6 + 2b U S + U
n n
(33)
allows one to express K and a as functions of the damping ratio £ and the na¬
tural frequency w n , These expressions are:
a
_ ^
= 2;
(34)
2. DIGITALIZED LOOP
The digital form of H(s), H(z), given by
H(z)
KF(z) G(a)
1 + KF(z) G(z)
(35)
is obtained by direct digitalization of F(s) and G(s), These transfer functions
. become: 1 ^
F(z) = 1 +
aT z
z - 1
where T is the sample time increment.
The block diagram for the direct digitalized loop now becomes as shown
in Figure 3-2 with an overall transfer function given by:
24
Figure 3-2. Linearized Digital Phase-Locked Loop
. Oj_z]_ KT . _ (1 + aT) a 2 - z _
IZ " e(z) i + KT (1 + aT) 2 (?. + KT) _ 1
Z ‘ Z [l + KT{l + aT)J + [l + KT(l + aT)]
In the linearized continuous loop, the error « is approximated by:
c(t) = ©ft) - e(t)
when 0(t) - 0(t) is small. For small error 0(nT),
f(nT) = 0(nT) - 6)(nT) a sin [6{nT) - @(nT)]
= sin 0(nT) cos (3(nT) - cos 6(nT) sin 0(nT)
The in-phase and quadrature components of the carrier, cos 6(nT) and sin 0(nT),
respectively, can be i.b'a.-ned by applying quadrature sampling techniques.
These techniques arc; d'scussed in Appendix A. The sin $(nT) and cos &(kT)
estimates are supplied by a digital oscillator.
An overall block diagram for the digitalized phase-locked loop using
quadrature sampling and a digital oscillator is shown in Figure 3-3.
C. RECURSIVE NONLINEAR DEMODULATOR (RNLD)*
1. INTRODUCTION
Another FM demodulator application of the digital oscillator was investi¬
gated during the study effort. It is a near optimum digitalized F? I modulator
■A Patent disc losure has been submitted by Texas Instruments on the Recur¬
sive Nonlinear Demodulator.
25
RF . IF , BASE BAND DIGITAL PROCESSING , AUDIO
1 I OUTPUT
Figure 3-3. Digitalized Phase-Locked Loop Block Diag:
derived from Bayesian estimation and optimal control techniques. It is re¬
cursive in that its next output is calculated from its previous value plus
weighted samples of the present input signal. In-phase and quadrature samp¬
ling techniques (described in Appendix A) are employed to reduce the received
narrow-band RF to baseband samples. These samples are then processed to
provide the estimate of the original FM modulating signal. Part of the pro¬
cessing algorithm consists of a recursive nonlinear time-varying gain calcu¬
lation; hence, the name Recursive Nonlinear Demodulator (RNLD). Since it
is a digitalized demodulator that also provides threshold extension, it is a
natural candidate for future digitalized tactical radios. For example, it will
be compatible with present in-the-field tactical VHF/FM radios, i. e., it will
operate with standard FM radios, but because of its threshold extension capa¬
bility, it will provide extended operating range.
In this subsection, the RNLD is discussed in rather general terms. A
concise derivation of the demodulator is presented in Appendix B.
2. RNLD SYNTHESIS
A block diagram model of the classical FM modulator and demodulator
used in the RNLD synthesis is illustrated in Figure 3-4. The input to the FM
modulator is u(t), a random process. In the synthesis, u(t) is assumed to be
a white gaussian process. This input u(t) is passed through a linear filter
whose output, cx(t), represents the weighed modulating signal or the weighted
speech process in voice communications. The time varying portion of the
output, x(t), is the random process and "c" is the so-called frequency deri¬
vation in reference to classical FM discussions. The output, s(t), of the
modulator is given by;
where "a" is the rms value of the carrier of frequency, w Q . Noise is added to
s(t) and this combined signal is supplied to the demodulator. This signal is
in-phase and quadrature sampled obtaining two sampled words per sample
period, z\ and zg. A discussion of in-phase and quadrature sampling and its
applications to narrowband FM processes is given in Appendix A. The output
of the estimator or demodulator, j£(t), is the time-varying maximum a post¬
eriori (MAP) estimate of the original signal x(t).
An equivalent baseband FM process for this FM carrier process is shown
in Figure 3-5. The in-phase and quadrature sampling permits a translation
from carrier to baseband representation. Notice that a constant term, 2iTAf,
is added to the modulating signal cx(t). This term represents the unavoidable
27
frequency uncertainty that exist between the transmitter and receiver fre¬
quencies for typical FM links. This frequency uncertainty will be reflected
in the observed samples at the receiver and its removal becomes part of the
estimators task.
The linear filter at the modulator is usually referred to as the message
filter or filter message model. As part of the synthesis procedure, the mod¬
ulator is modeled by a rtate variable representation. This idea is illustrated
in Figures 3-6 through 3-8. In Figure 3-6, a single pole RC filter is shown
in its state-variable representation. Figure 3-7 shows the model for the FM
process using the output, x(t), of this filter &b the input to the FM process.
The complete model for the FM process is shown in Figure 3-8 where the
vector differential equations are also given. This same idea can obviously
be extended to a multiple pole message filter.
The message model system equation is the linear vector differential
equation
Y(t) = AY(t) + U(t)
This equation has
unique solution.
11
(38)
SINGLE POLE FILTER
Figure 3-6, Single Pole Message Modej.
29
Figure 3-7. Model for FM
x(t)\ _ l-o o\ /x(t)\ /u,(t)\
e<t)/ \ c o J \q(X)J \ u 2 ( t)/
ett)
2X1 VECTOR Y("t) = AY<t)+ii( + )
SCALER 8<t) = T T Y(t): H = (0.1)
(0 '" (e!t>)' 6,,>
Figure 3-8. Continuou3 State Variable Representation of FM Process
Y(t) = *(t, t Q ) Y(t 0 ) + «(t, x) U(t) dr
where 4>(t, t Q ) is the system transition matrix. For linear time-invariant
systems,
( 39 )
39
4>(t, t ) = (40)
It is shown in Appendix B that the discrete difference equation for FM us¬
ing the single-pole filter is:
Y(k + 1) = #Y(k) + w(k) (41)
where:
(42)
w(k) = T U(k)
T = the sample interval
The equivalent discrete baseband modulator is shown in Figure 3-9 for a
general multiple pole filter. The input to the demodulator Z(k) is a 2 x 1 vec¬
tor where the equations are also shown in Figure 3-9. This model provides
the necessary characterization to synthesize the RNLD.
The algorithm for estimating the original sampled message x(k) ie given
by:
£(k) = S T Y(k) (43)
where ST = (1 , 0). The recursive algorithm for obtaining Y(k) for inphase
and quadrature sampling in white noise is given by a set of coupled recursive
equations. These equations are:
Y(k + 1) = 4>Y(k) - “• F (k + 1) r{zi(k + 1) sin G(k) + z 2 (k + 1) *
cos 6(k)[
(44)
P(k + 1) = [3>P(k) + Q$" T ] j [$' T + rr T (®P(k) + Q$' T ).
{zj(k + 1) cos 9(k) - z 2 (k + 1) sin 6(k)[J | *
where P(k + 1) is a N x N matrix.
31
1
Figure 3-9. Block Diagram of the Message Process Illustrating Discrete
State Variable Characterization of the Angle 0(k)
3. SINGLE-POLE FILTER EXAMPLE
For a single-pole message model, the parameters of the recursive al¬
gorithm are:
Y(k) T = [x(k), e(k)]
*11
1
NI
^■4
-e-
-oT
e
0
« =
*21
1
CM
-e-
c .. -»T.
- U - e )
1
(45)
c = frequency deviation
a = 3 dB frequency of the filter
T = sample interval
2
a ? = input carrier-to-noise ratio
O'
n
A A
The x(k) element of Y(k) is the estimate of the message that is sought. In the
Q matrix, cr ^ is the variance of the message filter input, ui(t),and a-jP is the
variance of the frequency uncertainty ZnAf, where for convenience Af is as¬
sumed to be a Gauss Markov white sequence. The part of the last assumption
pertaining to the white sequence is difficult to justify; however, when crystal
controlled frequencies are used is quite small compared to <and the
degradation is most likely insignificant.
A realization of these estimation equations is illustrated in Figure 3-10.
In the absence of noise, the input to the fixed gain Gj^ is: sin[0(k) - 0(k)] ^
0(k) - 0(k). Under the same input situation, the input to the nonlinear time-
varying gain processor is cos[0(k) - 0(k)]. The realization of these two sig¬
nals resemble the in-phase and quadrature detectors sometimes used in
phase-locked loop (PLL) receivers. It is clear that the form of the demodu¬
lator resembles a PLL demodulator where the loop filter and the digitized
VCO (digital oscillator), constitute the other elements of the loop. The main
departure from the phase-locked loop demodulator is the time-varying gain
processor; the algorithm for this processor is defined by the equation for
P(k + 1).
33
( 46 )
The gain term is given by:
G 1 ='/ 2*/ In 2
where <r n ^ is the noise power, defined in the input IF bandwidth, and "a" is the
rms carrier voltage. It is interesting to note that the input to the time-varying
gain processor is the quadrature phase component which is often used for auto¬
matic gain control (AGO) in phase-locked loop receivers. This might be the
reason that matching G^ to the input carrier and noise power was not too cri¬
tical as far as the demodulator performance was concerned, This fact was
discovered during the simulation of the demodulator.
The simulation of the demodulator of Figure 3-10 was accomplished using
digital computer simulation techniques. Of particular importance in deter¬
mining the performance of FM demodulators are curves relating the output
signal-to-noise ratio in the message bandwidth (SNR) to the carrier-to-noise
ratio in the IF bandwidth* (CNRjp). Consequently, the ultimate purpose of
the simulation was to obtain these SNR performance curves; Figure 3-11 il¬
lustrates the SNR performance curves obtained by simulation of the single-
pole message filter example of Figure 3-10.
In these curves [I, the modulation index, is defined as:
P-f < 47 >
where c is the radian frequency deviation and a is the 3 dB bandwidth of the
single-pole filter. Curve A is the SNR performance curve for the demodula¬
tor for (3 = 5 and fixed gain Gj matched to CNRjp = 20 dB. Both curves were
obtained for a sinewave test signal of frequency (1/50)T where T is the sam¬
ple interval. Curve B was obtained from an identical simulation as was curve
A, except a single-pole digital filter like that used in the message filter was
also put at the output of the demodulator. Since sinewave test signals were
used, this filter should and did improve the above-threshold performance.
However, the threshold (1 dB below the linear extension of the curve) is al¬
most identical on each curve occurring at CNRjp s 4 dB.
This would tend to indicate a threshold improvement of about 6 dB over
conventional discriminator demodulators when using sinewave test signals.
A very important factor associated with threshold performance of FM de¬
modulators is the type of message spectrum employed, VanTrees 1 ^ illus¬
trates this where he compares FM threshold performance single-pole and
two-pole Butterworth message spectrum. The two-pole message characteri-
*Carson rule bandwidth definition was used in the simulation.
35
Figure 3-11. Signal-to-Noise Performance Curves
Obtained From Simulation
zation has about a 2 dB threshold improvement above that for a single-pole
message characterization. In the simulated test, single unfiltered sinewave
test signals were employed. An ensemble of sinewaves with random phase
passed through the message filter would be a more meaningful test. However,
the demodulator of Figure 3-10 does appear to provide threshold extension
equal to or better than the analog threshold extension demodulators reported
in the literature. ^
36
D. DISCRETE FOURIER TRANSFORMATIONS
Nonrecursive digital oscillator schemes have been used for some time
in the well-known and many-times-published Fast Fourier Transform (FFT)
algorithm. In the FFT, an array of sine and cosine values are appropriately
prestored by taking into account the symmetries involved in the transform
and the sinusoid itself. These sampled values are then used repeatedly in the
transform.
For many applications the FFT is either too complicated or lacks versa¬
tility; the discrete Fourier transform (DFT) is usually preferred for these
applications. A nonrecureive digital oscillator is also well suited to this type
transformation. All that is required (at least hardware wise) to perform the
DFT is a fast multiplier and adder to perform the necessary convolutions and
a digital oscillator for providing the various frequencies required. The Fou¬
rier coefficients are then available directly in the adders.
E. SYNCHRONIZATION
Synchronization is one of the fundamental requirements in coherent com¬
munication systems. In transmission of information in the continuous wave or
analog mode, synchronization implies precise knowledge of the phase of the
incoming carrier before the near-optimum coherent demodulation can be im¬
plemented. In digital data transmission, the elements of synchronization in¬
clude carrier sync, bit sync, and frame sync. Bit synchronization is always
required in digital data reception, but carrier requirements and frame syn¬
chronization requirements are dictated by the demodulation performance de¬
sired and the type of data, respectively. To determine the role of the digital
oscillator in implementations of synchronization systems, we will review what
the digital oscillator provides as its output and where this particular type of
output is useful in synchronization.
The output of the digital oscillator is sample values of the amplitude of
sine and cosine waveforms, i. e. , sin u> Q t^ and cos w Q t^ where t^ is the sample
time. These outputs are binary words which occur at the basic clock time of
the digital oscillator.
Frequency, as Buch, is not a direct output, but is implicit in the sequence
of output binary words. When we consider the output as zero-width spikes oc¬
curring at the sample time and whose height represents the amplitude of the
sampled Bine or coBine value, the frequency spectrum has one form. When,
however, the spikes are connected to form a stairstep waveform (a zero-
order hold) the spectrum will change. It will again change when this stairstep
waveform is passed through a filter as is done to generate continuous time
waveforms for analog processing. Figure 3-12 illustrates this concept by
37
LEVEL OUTPUT BOXCAR OUTPUT
DIGITAL
WORD
Figure 3-12. Block Diagram Showing the Different Time Waveforms Going
from Digital to Analog Processing when using the digital
Oscillator
showing the different types of waveforms which evolve when going from a se¬
quence of digital words to a continuous waveform.
Suppose that the digital oscillator is to be used to obtain bit timing marks
which can be varied in both phase and frequency. Then the output of the digi¬
tal oscillator would not only have to be D/A converted to obtain a sinewave
waveform but this sinewave would have to be further processed as illustrated
in Figure 3-13 to obtain the bit timing marks. Obviously, the important
Figure 3-13. Block Diagram Showing the Application of a Digital
Oscillator to 'obtain Timing Marks for Bit Syn¬
chronization
attribute desired of the sine wave at the output of the D/A converter is the
zero crossing purity, since in this bit sync scheme, these carry all the bit
timing information.
This bit sync example illustrates an important point: the digital oscilla¬
tor does not generate timing marks, It does, however, generate numbers
from which timing marks can be obtained, Evidently, timing mark generation
is necessarily an analog type of process which requires additional analog cir-
■ itry for its implementation. Thus, bit synchronization, which is mostly
tim.ng mark generation, is not too amenable to digital oscillator application,
Nevertheless, it can be implemented through use of the digital oscillator
which could be advantageous when the digital oscillator is already available.
The major role the digital oscillator has in synchronization iB that of the
VCO replacement in digitalized feedback control loops, e, g. , the digitalized
phase-locked loop. The breadboard model discussed in Section IV of this re¬
port can easily be modified to operate in a phase-locked-loop configuration
for carrier synchro:.ization, Unfortunately, the upper frequency bounds (=10
MHz) on the design of die oscillator limits the frequency of the carrier to be
acquired to the lowei HF and below frequency spectrum.
Wireline modem synchronization is an area of intense interest at the pres¬
ent time. The digital oscillator used as a VCO replacement in a carrier syn¬
chronization scheme should have wide application either in a PLL configura¬
tion or a modified version of the recursive nonlinear demodulator (RNLD)
discussed in the previous subsection.
Since the digital oscillator can perform any operation that a standard
VCO can perform, but usually with greater precision and stability, its appli¬
cation to the synchronization problem of future digitalized communication
systems is apparent.
39/(40 blank)
SECTION IV
BREADBOARD DESIGN DISCUSSION
A. GENERAL
A block diagram of a nonrecursive digital oacillator is shown in Figure
4-1. The thumb-wheel read-in's allow one to select the desired output fre¬
quency (for frequency synthesizer applications) or the desired quiescent fre¬
quency (for VCO applications). The thumb-wheel outputs are binary numbers
representing each decimal number selected. These individual outputs enter
GAIN
DIGITAL
OUT
Figure 4-1. Nonrecursive Digital Oscillator
a decimal- to-binary converter (DBC), the output of the DBC, denoted as d,
being an N-bit binary representation of the desired decimal frequency. This
N-bit number then enrera as one input to the first N-bit adder. The other
input, call Ad, to tins adder is a k-bit number coming from an analog-to-dig-
ital converter (ADC ) ; .. input of the ADC being analog modulating signals
for FM modulation or < i ror signals for tracking loop configurations.
The k-bits from the ADC are added to the N-bits from the DBC, the k-
bita occupying the I least significant bits of the N-bit adder. The resulting
N-bit output, d + Ad(nAT), is an indication of the rate of speed for stepping
around the phase circle as discussed in Section II. B, 1. In the r.onrecursive
digital oscillator configuration shown in Figure 4-1 the thumb-wheels allow
one to determine the interval for selecting points from the phase circle. The
ADC output causes pertubations in this interval depending on the input modu¬
lating signal.
The second adder performs an integration to maintain a complete history
of the inputs d t Ad(nAT), and has at its output
which is held in a storage buffer. The adder performs a modulo 1 addition
so that at any time ita output completely specifies some unique point on the
phase circle, i. e„ , (Sum Mod 1)• (2 it),
The moat significant M bits of this sum are used as an address for look¬
up in the read-only-memory (ROM), where 2^ sinusoid values are stored.
These values are selected at intervals of 2ir/2 M radians around the phase
circle. These M bits serve as the address since the adder performs modulo
1 addition and therefore indicates directly the exact location on the phase
circle.
The ROM output is a J-bit binary word representing the sinusoidal value
at the position specified by the M-bit address, The order of J may oe varied
depending on the required significance in the output word, and its selection
is independent of other parameters in the system.
An interesting point to be made here is that one can attain any frequency
resolution desired by manipulation of the system parameters. The minimum
resolution element (MRE), analogous to the elementary bandwidth when taking
the discrete Fourier transform, is given by:
-N
MRE = 2 • f ,
s
where N is the number of bits in the adders. As an example, assume an N
of 20 bits and a clock rate of f fl - 2 N = 1,048,576 Hz. The resolution ele¬
ment MRE is then
MRE = 2" 20 • 2 20
= 1 Hz
Therefore, 1 Hz resolution may be obtained by making the above selections.
A resolution of 0. 25 Hz may be obtained by letting f g = 2^“^; i. e. ,
= . 25 Hz
These resolutions are however dependent on the stability of the oscillator
used in generating f s and therefore are minimum bounds.
This oscillator de3ign used in the breadboard has the following specifi¬
cations. The adders are 22-bits, the sample rate 2^2 Hz. This combination
allows 1 Hz resolution between 1 Hz and 1 MHz. The read-only-memory
contains the equivalent of 256 8-bit words,
The ADC has 12-bits operating at a sample rate of 50 kHz. The design
criterion is summarized as follows:
42
N
=
22 bits
-8
=
2 22 Hz
MRE
=
1 Hz
M
=
8 bits
J
8 bits
K
=
12 bits
^max
f B / 4 = 1 MHz
B. BREADBOARD CONFIGURATIONS
Thia section presents the two basic breadboard operating configurations-
frequency synthesizers and VCO replacements. Included in frequency syn¬
thesizers are synthesizers themselves and frequency translators; in VCO
replacements are tracking loops and frequency modulators.
1. FREQUENCY SYNTHESIZERS
a. Frequency Synthesizer .
A configuration demonstrating the use of a digital oscillator as a fre¬
quency synthesizer is shown in Figure 4-2, A fixed "d" representing the fre¬
quency to be synthesized is presented to the digital oscillator. The outputs
of the digital oscillator are binary words representing the digitized sinusoid.
These words are then digital-to-analog converted (DAC) and low pass filtered
(LPF). The output of the L.PF is an analog sinusoid of the desired frequency.
b. Frequency Translator
A frequency translator configuration is shown in Figure 4-3. A fixed "d"
representing some frequency f c is input to the digital oscillator. The digital
oscillator output, once passed through the DAC and LPF, becomes the re¬
quired sinusoid of frequency f Q . This sinusoid and an input signal of fre-
d
A MHZ
OUTPUT
Figure 4-2. Frequency Synthesizer
43
INPUT
4 MHZ 4 MHZ
Figure 4-3. Frequency Translator
quency f{ are then mixed and low pass filtered. The output of the LPF is a
signal representing the difference frequency ftf = fo ' ^i» and ia the trans¬
lated output. The down translation is selected because of its simplicity, but
the up translation could also be performed if adequate bandpass filters were
constructed.
2. VCO REPLACEMENTS
a. Tracking Filter
The next configuration, the tracking filter, is shown in Figure 4-4. The
loop itself is the conventional tracking filter loop with the voltage controlled
oscillator (VCO) replaced by the digital oscillator and appropriate converters.
The input signal is assumed to have a carrier f c and a maximum doppler rate
of 100 Hz. This maximum doppler insures that the loop can be constructed
in such a way that it will not. track audio modulating signals transmitted by
the carrier. The quiescent frequency of the digital oscillator is adjusted to
be at some frequency fq. When initialized, the input carrier and the analog
equivalent output of the digital oscillator are mixed and passed through the
LPF generating a signal having frequency fq - f c = fo- This signal is input
into a frequency disciminator centered at 100 kHz (for illustrative purposes)
with the output being a signal indicating the frequency difference between f D
and the center frequency of 100 kHz. This difference is low pass filter with
a filter having a cutoff of 250 kHz before being fed into the ADC and finally
the digital oscillator. The difference frequency will eventually lock to 100
kHz, the center frequency of the frequency discriminator. Low frequency
doppler shifts will be tracked out, but high frequency modulating signals will
not.
b- Frequency Modulator
The FM modulator configuration, shown in Figure 4-5, also makes use of
a digital oscillator as a replacement for a VCO. The modulating signal is
input into the ADC, its output thus supplying an indication of the modulation
44
1
C. BREADBOARD DESCRIPTION
1. MECHANICAL DESCRIPTION
The breadboard construction consisted of dual-in-line integrated circuits
mounted in sockets which were wire-wrapped on plug-in cards. The 4 inch
by 4 inch cards accommodated 10 to 20 sockets (integrated circuits). The
cards, in turn, were mounted on a rack where intercard wiring could be
achieved. Analog circuits were mounted on plug-in cards so that the entire
system could be contained in a card rack. The card rack and required power
supplies were mounted in a 19-inch rack-mountable cabinet. The front panel
of the completed breadboard is shown in Figure 4-6.
2. OPERATIONAL DESCRIPTION
The digital oscillator (DO) breadboard can be sectioned into 10 functional
blocks, each mounted on one printed circuit board (PCB). Nine of these
boards are mounted in a card file; the tenth, the power regulator board is
mounted at the rear of the chassis along with the remainder of the power
supply components.
a. Digital Portion
Figure 4-7 shows the seven digital blocks of the digital oscillator. A
description of each of these blocks and their functions follow.
1) Recursive Adder Board (Board E). The recursive adder board
forms the heart of the DO function. This board generates a 9-
bit binary digitized sinusoidal whose frequency is specified by
a 20-bit binary input board. This is accomplished as follows
(Figure 4-7).
The 20-bit word A is applied to the 20 LSB of one input of
a 22-bit full adder. The other 22-bit input is tied to the outputs
of a 22-bit parallel register. The 22 sum lines from the adder
are tied to the inputs of register E. The E-register is clocked
at the rate of 2^ Hz, and at each clock pulse, the sum of the
input word A and the present contents of the register are stored
in the register.
The 10 MSB of the register are used to control the sinusoidal
generation process, The 8 LSB's of these 10 are fed through
controlled inverters to the 512-bit ROM address inputs. The
second MSB controls the inversion, with inversion occurring
when this line is a logic 0. The MSB (sign) and the eight outputs
of the ROM are then routed to the DAC Board, Board F.
46
Figure 4-6. Breadboard Mechanical Package
2) DAC Board F. The DAC board accepts the nine ROM bits and
the sign bit from the Adder Board E, anti connects the words
to an analog sinusoidal output. The SIGN-bit line controls the
MSB input of the DAC and a two's complement operation. The
two's complement of the incoming 8-bit word is generated by
complementing all the bits and adding a binary 1. These eight
bits are buffered by a parallel register clocked at the system
rate of 2^2 Hz.
The analog output of the DAC is buffered by a wideband op¬
erational amplifier and made available to a front panel test
point. This signal is also passed through a two pole, 2 MHz
LPF to partially remove Hz switching rate noise.
3) Buffer Board I. The buffer board provides further low pass
filtering for the filtered output from the DAC board. This
doubly filtered output is then routed to the OSC OUT connector
and the Mixer Board G.
4) Modulation Board D. The 20-bit binary input word "A" to the
recursive adder board is provided from the Modulation Board
D, which provides the sum of the 20-bit front panel word and
optionally the 12-bit ADC word (see Figure 4-7).
The 20-bit front panel derived word is generated by pro¬
viding the proper number of clock pulses to a 20 bit ripple
through counter whenever the front panel settings are changed.
This clock is supplied by the BCD to Binary Converter Board B,
The 12-bit ADC derived word is supplied from the ADC
Board C and made available to the modulation adder through a.
12-bit input buffer register. These words are formed in two's
complement binary and enable subtraction as well as addition.
When modulation by the ADC is not desired (Synthesizer and
Translation modes) the register is set to zero by a clear en¬
able line from the mode control switch.
A start conversion clock of 32 kHz is generated from the
master clock and provided to the ADC module, and this module
in turn supplies the End of Conversion pulse to clock the 120-
bit modulator register.
5) ADC Converter Board C. This board contains an input buffer
amplifier/level converter and the 12-bit ADC module. The in¬
put to the buffer amplifier is controlled by the mode switch and
is either the FM IN terminal or the internal FM discriminator.
6) BCD/Binary Converter Board B. The 24 BCD input lines f-om
the front panel switches are converted to a binary word by en¬
abling a 2^ Hz clock to both a binary counter and a BCD counter
48
SIGN
INVERTERS
1
I
_L
▼
BUFF EF
f BOARD 1
4
-1
CONN DIRECTLY TO BOARD
TP3
TPuIND
clock <jn
CLOCK jl2
CLOCK BOARD A
Figure 4-7. Breadboard Digital Layout
49/(50 blank)
until a 24 bit comparator determines that the BCD input and
the BCD counter are the same. The count clock is then dis¬
abled and the binary counter (located on board D) holds that
count in binary form unLil the 24 bit comparator signals that
a front panel change has been made.
22
7) Clock Board A. This board includes a 2 Hz crystal oscillator
and digital clock drivers for Clock and Clock.
b. Analog Portion
Figure 4-8 illustrates the two analog boards.
1) Mixer Board G. This board includes a balanced mixer and two
IF (low pass filters).
One input to the mixer is the digital oscillator, the other
the HF IN front panel terminal. The outputs of the 100 kHz
LPF are available on the front panel and to the Discriminator
Board H.
2) Discriminator Board H. This board includes a zero crossing
detector and 10 psec one-shot (for frequency discrimination)
followed by two parallel filters. One of these is a 100 Hz LPF
used in the system tracking loop; the other is an AC coupled
2 kHz LPF providing detected FM to the DISC OUT terminal.
51
SECTION V
BREADBOARD DEMONSTRATION AND EVALUATION
The demonstration and evaluation of the digital oscillator operating in
the two basic configuration, frequency synthesizers and VCO replacement,
are performed by first converting the digital words to analog by digital-to-
analog conversion techniques. Once in an analog form, direct comparisons
are made between the digital oscillator waveform and that generated by con¬
ventional analog equipment. In addition, analog test equipment can be used
to measure meaningful properties of the waveform itself.
A. DEMONSTRATION
1. FREQUENCY SYNTHESIZERS
a. Frequency Synthesizer
The breadboard can be demonstrated as a frequency synthesizer using a
frequency counter, a distortion analyzer, and a spectrum analyzer. The
spectrum analyzer should be of the narrow bandwidth-type to allow the ex¬
amination of close-in sidebands, and each of these instruments should be
capable of 1.0 MHz operation. SeeFigure5-l for the required connections.
By placing the breadboard in the SYNTHESIZER mode (see Figure 4-6) and
entering the desired frequency on the thumb wheel read-ins, the sinusoid of
the appropriate frequency will appear at the OSC OUT connector on the front
panel. A check of the frequency is performed by connecting OSC OUT to a
frequency counter. To check for harmonic distortion, OSC OUT is connec¬
ted to the distortion analyzer. The spectrum analyzer when connected to
OSC OUT will measure the location of the sidebands and their relative mag¬
nitudes. These are meaningful and very appropriate tests- for any frequency
synthesizer.
Figure 5-1. Frequency Synthesizer
53
b. Frequency Translator
The frequency translator function (the TRANSLATOR mode) (Figure 5-2)
makes use cf the digital oscillator and the mixer contained in the breadboard.
The IF output frequency can be observed to be the differences between the
HF analog input frequency (HF IN) and the digital oscillator (DO) front panel
frequency setting from the decimal read-ins.
f IF = | f HF ' f Do|
The difference (IF) frequency is limited to 150 kHz by the IF low pass filter.
The resulting translated signal will appear at the IF OUT connector on the
front panel. In this mode a 100 kHz FM discriminator will also detect any
frequency modulation of the HF input with the modulation appearing at the
DT5'C OUT connector.
2. VCO REPLACEMENT
a. Frequency Modulation
The frequency modulation (FM) function, performed when the rotary
switch is in the MODULATION mode, is illustrated in Figure 5-3. T u this
I-1
Figure 5-2, Frequency Translation
54
Figure 5-3. FM Synthesizer
mode, the FM center frequency is selected from the thumb-wheel read-ins,
and the analog modulating signal is entered at the EXT FM connector on the
front panel. The signal at EXT FM is analog-to-digital converted to 12 bits
and appropriately added to the binary representation for the center frequency.
The frequency modulated output will appear at OSC OUT connector on the
front panel. The same tests as in the SYNTHESIZER mode, except for the
harmonic distortion test, may now be performed. Frequency shift keying can
be demonstrated by applying a square wave input to the EXT FM connector
and linear swept frequencies can be generated by application of a sawtooth
waveform. FM sidebands should be examined with a spectrum analyzer and
the FM waveforms can be observed on an oscilloscope. Modulating frequen¬
cies are limited by Nyquist criterion to one-half the ADC conversion rate of
32. 768 kHz (2 15 ).
b, Tracking Filter-
In the tracking filter mode (mode selector switch set to TRACKING FIL¬
TER), a loop is formed such that carrier frequency offsets (entered at HFIN)
may be corrected to maintain a 100 kHz IF frequency out of the discriminator
output. This error voltage is A to D converted, with this now used as a
55
correction factor added to the DO frequency input word to minimize the off¬
set. This demonstration is illustrated in Figure 5-4.
If an input frequency f^p is applied to the mixer, the system loop will
adjust the DO with bounds such that
This 100 kHz IF and the DO frequency can be counted and compared. The
loop error voltage from the discriminator is available at a test point and the
wideband output of the discriminator at the DISC OUT connector.
B. EVALUATION
The demonstration procedure discussed in the previous section has been
used to evaluate the performance of the nonrecursive digital oscillator bread¬
board in the two basic operating configurations. The performance results
follow:
I-1
DECIMAL
INPUTS
Figure 5-4. Tracking Filter
\
56
1. FREQUENCY SYNTHESIZERS
The criteria for measuring performance of frequency synthesizers have
been stability, frequency distortion, and location and level of sideband ener¬
gy. These measurements provide a very meaningful and useful description
of synthesizer performance.
a. Stability
The stability of the digital oscillator was measured using the aet-up
shown in Figure 5-5. These measurements were made using an. external-
oven-controlled-crystal standard as the clock for the breadboard bo that any
measurable frequency fluctuation could be attributed to the oscillator itself,
and not the clock. (There is a BNC connector on the back of the breadboard
for external clock inputs, and a switch for selecting either external or in¬
ternal clock).
The procedure is as follows: an input frequency is selected on the deci¬
mal-read-ins on the front panel of the breadboard. The resulting analog out¬
put then enters the HP5360A frequency counter. This counter makes a direct
frequency to 9-decimal digit conversion; the nine-digits displayed on the
read-outs. These nine-digits also enter the HP580A selector and digital-to-
analog converter.
The HP580A is a three-digit converter, the three-digits manually se¬
lected from the nine-digits available by a'front panel knob. This knob was
calibrated before hand so that a 1 Hz frequency change on the input would re¬
sult in a full scale deflection of the brush mark recorder. A frequency of
approximately 500 kHz was selected for the stability measurement, with the
resulting brush marker output shown in Figure 5-6. Also included in the fig¬
ure is a comparison stability measurement of a Type 1163A, General Radio
frequency synthesizer. Both the DO and the General Radio frequency synthe¬
sizers are stable to well below 1 Hz, with the DO having a fluctuation of ap-
EXTERNAL
STANDARD
Figure 5-5. DO Stability Measurement
5
TYPE 1 163A
GENERAL RADIO
FREQUENCY SYHTHESIZER
Figure 5-6. Stability Comparison
proxlmately 0. 08 Hz. For the clock rate of 4 MHz, this is stability to fifty
parts per million, a figure well below the design objectives of the DO.
b. Harmonic Distortion
A conventional analog distortion analyzer was used to perform these
measurements on the breadboard. These analyzers measure the ratio of the
sideband energy to total energy. The analyzer was connected to the analog
out connector on the front panel, the output frequency from the analog out
having been selected by modifying the thumb-wheel read-in's. Figure 5-7 is
a plot of frequency versus percent distortion over the frequency range of the
digital oscillator. There is less than 0. 8 percent distortion up to 10 kHz,
and increases to approximately 1. 6 percent at 500 kHz. This is good perfor¬
mance for such a relatively inexpensive frequency synthesizer.
c. Harmonic Content
Fourier analysis of simulated digital oscillator outputs were performed
and discussed in Section II. B. 2 for various frequency to sample rate ratios.
In addition to tins, an analog spectrum analyzer has been used as back up for
the Fourier analysis. A frequency of 186, 413 Hz was selected as a test case.
58
Fieure 5-7. Percent Distortion vs Frequency for Digital Oscillator
Tliis corresponds to a frequency versus sample rate ratio of 1/22, 5, the
ratio used in generating the Fourier analysis shown in Figure 2-8. The
spectrum analyzer output is shown in Figure 5-8, with the horizontal scale
100 kHz per division and the vertical scale in DB's. Unfortunately the verti¬
cal scale on the analyzer could not be calibrated, but a linear examination of
the sideband near 360 kHz indicated approximately 50 dB difference between
it and the major lobe, This corresponds closely with the theoretical results
predicted. The important thing to notice is the location of the various side-
lobes. There is one at approximately 93 kHz, the major lobe at 186 kHz,
another eidelobe at 279 kHz, and so forth at 93 kHz increments through the
band. This sidelobe placement was predicted by the theoretical analysis per
formed.
2. VCO REPLACEMENT
Voltage controlled oscillators are generally evaluated in terms of fre¬
quency linearity, amplitude and frequency stability, pull-in range, harmonic
distortion ratios, and harmonic content. These are by no means the only
criteria used, but are some of the major ones. The evaluation of the digital
oscillator in terms of the indicated criteria is included in this section. Also
o
u
t-
<
IK
£Q
J
<
o
Z
3
100 KHZ/DIV
Figure 5-8. DO Spectrum for Input Frequency of 186. 413 Hz
60
included are discussions of the performance of the digital oscillator VCO re¬
placement configuration functioning in linear angle modulation and frequency-
shift keying applications.
a. Frequency Linearity
Figure 5-9 illustrates the frequency versus dc-input characteristics for
the breadboard operating as a VCO replacement. The frequency axis is
measured with respect to the quiescent frequency of the VCO, thus the label
Afrequency. The curve is obviously very linear in the region ±16 kHz of the
quiescent frequency.
b. Amplitude and Frequency Stability
There is no reason to even consider amplitude stability of the digital os¬
cillator since the output peak amplitude is fixed and constant for a.ll frequencies
The frequency stability was discussed in Section V, paragraph B. 1, a. The
net conclusion is however that amplitude and frequency stability are no prob¬
lem with the digital oscillator when operating as a VCO replacement.
c. Pull-In Range
The pull-in range of the digital oscillator operating as a VCO is deter¬
mined by the word size of the analog-to-digital (A/D) converter used in con¬
verting the analog control voltage. For a word size of M bits, the pull-in
range is Hz for the 1 Hz resolution of the breadboard. Therefore, any
pull-in range can be obtained, at least to within the limitations of conven¬
tional A/D converters.
d. Harmonic Distortion and Harmonic Content
Both harmonic distortion and harmonic content were examined in the pre¬
vious section on evaluation of the frequency synthesizer configurations, and
were found to be quite acceptable. The analysis also holds for this configura¬
tion.
e. Application Analysis
The digital oscillator has been shown to meet the basic requirements
necessary to operate as a VCO replacement. It is of interest therefore, to
include some basic applications and the performances for each. The two
applications considered are angle modulation and frequency shift keying.
i) Angle Modulation, It is generally quite difficult to evaluate the
performance of a VCO in an angle modulation application. One
method is to examine the frequency spectrum of the modulated
output signal from the VCO. For high modulation indices, the
frequency spectrum should approach a form similar to the don-
61
aity function of the modulating Bignal. For sinusoidal modula¬
tion, the density function is as shown in Figure 5-10 (for uni¬
formly distributed phases)^.
The frequency spectrum of the VCO configuration for sin¬
usoidal modulation and a modulation index of 100 is shown in
Figure 5-11. The procedure used is the same as that discussed
in Section V. B. 1. c. The spectrum does in fact look very much
like the density function for a sinusoid shown in Figure 5-10, as
theoretically predicted.
Figure 5-10. Density Function of Sinusoid of Peak a.
100 KHZ/DIv
Figure 5-11. Frequency Spectrum for VCO Configuration
63
2) Frequency Shift Keying (FSK). The FSK application is demon¬
strated by changing the modulating signal from sinusoidal to a
square wave, and using the frequency modulation set-up .
VCO's operating in FSK applications are generally evaluated in
terms of the time required to change from one frequency to the
other and in terms of continuity in phase. Figure 5-12 presents
the output modulated signal from the digital oscillator (traces a)
for a square wave modulating signal (trace b). (The square
wave and the output waveform are not synchronized-an operator
error). The figure, however, illustrates the instantaneous
changes in frequency and the absolute continuity in phase, both
very desirable properties of a VCO for FSK applications.
Figure 5-12. FSK Application of DO
SECTION VI
CONCLUSIONS
I
A. SUMMARY
Two basic techniques for synthesizing digital oscillators have been dis¬
cussed. The first, the recursive technique, resulted from an examination
of the difference equations describing the relationship between the present
output and some linear combination of past outputs and inputs. It has been
shown that the coefficients of the difference equation result in poleB which are
on the unit circle (in the z domain). These poles are, therefore, inherently
unstable, with the result being an error build-up in the output sequence.
These errors were shown to increase linearly with time - a very undesirable
situation. Three techniques were presented for reducing this error build¬
up, but none could provide perfect or even near perfect error correction.
The second, the nonrecursive technique, uses a read-only-memory
(ROM) look-up table where a number of samples from one cycle of a sinusoid
have been prestored. These samples are selectively extracted from the ROM
to generate the desired output sequence. It is physically impossible to store
all samples for one cycle of a sinusoid in a finite size ROM; therefore, errors
must occur in the amplitude of the output sequence. These errors are, how¬
ever, bounded and were shown to be less than 2. 45 percent for an ROM con¬
taining the equivalent of 256 sample values,
Two basic configurations for application of digital oscillators, frequency
synthesizers and voltage controlled oscillator (VCO) replacements, were
suggested. The inherent error build-up (either with or without error cor¬
rection), the complexity, and the required low frequency operation (because
of the time required to perform the indicated arithmetic operations) have
combined to eliminate the recursive technique for digital oscillator synthesis
from use in the two basic configurations. On the other hand, the nonrecur¬
sive technique is directly amenable to these configurations as a result of its
low cost, relatively high speed (10 MHz upper limit)*, and bounded error.
A breadboard was constructed utilizing the nonrecursive technique for
digital oscillator synthesis. For demonstrating the frequency synthesizer
configuration, modes for both frequency synthesizer and frequency translator
applications were provided. For VCO replacements, modes for frequency
modulation (FM) and tracking filter applications were similarly included.
Experimental evaluation of the breadboard was performed, with favorable
results obtained. In frequency synthesizer configurations, the following
*The breadboard has been designed with a 1 MHz maximum frequency, but
present logic speeds would allow synthezis up to 10 MHz.
65
results were obtained: 1. The stability was shown to be entirely dependent
on the crystal clock used as the fundamental; 2. The harmonic distortion was
less than 2 percent for the entire 1 Hz to 1 MHz range; and 3. The harmonics
present were separated in frequency enough to allow conventional filtering
techniques to be used where lower harmonic levels are desired.
As a VCO replacement, the frequency linearity around the quiescent was
shown to be extremely good, and the pull-in range, determined entirely by
system design requirements, may be increased or decreased simply by mod¬
ifying the digital logic.
All thingB considered, the nonrecursive technique for digital synthesis
of oscillators has been shown to operate as well, if not better, than conven¬
tional analog circuits in the basic configurations, frequency synthesizer and
VCO replacement.
B. RECOMMENDATIONS
1. The nonrecursive technique for digital oscillator synthesis
has found wide application in communication related areas; many
of these have been discussed in this final report. It would there¬
fore, be of benefit to consider the application of large-scale
integration (LSI) implementation procedures to the nonrecursive
digital oscillator alogrithm. The desired result would be a
single chip containing the ROM and necessary arithmetic units,
where the alogrithm would be kept as general purpose as possible.
2. The breadboard has demonstrated that both high resolution (1 Hz
resolution for a 4 MHz crystal clock) and high stability are pos¬
sible using the nonrecursive technique. Many applications, and
in particular the instrument landing system (ILS) application,
require both high resolution and high stability. In the ILS ap¬
plication, a linear swept frequency is generated and transmitted
to incoming aircraft. The aircraft receives a small segment of
the sweep-the frequency of the segment indicating position with
respect to some reference. Conventional VCO's cannot main¬
tain the sweep accuracy necessary to achieve the required posi¬
tion accuracy, and therefore, are of minimal value. It is there¬
fore suggested that some effort be devoted to this type application,
where high resolution and/or high stability are required, to
determine: (1) if a nonrecursive digital oscillator is applicable,
and (2) if any improvement in system performance would result
from the use of the digital oscillator.
3. The recursive nonlinear demodulator (RNLD) discussed in Sec¬
tion III. C of the final report appears to be capable of providing
near-optimum threshold extension technique for digitalized FM
66
receivers. It merits further investigation. Included below are
some suggestions for further investigation in this area:
a. A computer simulation should be developed to compare the
SNR performance of the F.NL.D and other FM demodulation
techniques. Both single sinewave modulating signals and
synthetic broadband modulating signals should be used in the
testing. The effect of different message models (filters)
on the SNR performance should be considered.
b. Simplification of the gain matrix equation should be sought
and the effects of these simplification on the SNR perfor¬
mance investigated. It would also be interesting to analyze
the threshold phenomena of the RNLD and compare this with
the more classical ’click" analysis of FM demodulators con¬
tained in literature. Application of the RNLD techniques to
other problems of angle demodulation should also be pursued.
c. Finally, a breadboard model of the RNLD Bhould be fabri¬
cated that would be capable of demodulating narrowband FM
voice. The above two suggested investigations would help
direct the design of the breadboard to the most cost effec¬
tive configuration.
67
REFERENCES
1. Langenthal, I. M. , Digital Technique Study, RADC Final Technical Re¬
port No. RADC-TR-69-2 7.
2. Rader, C.M. , and Gold, B, , "Effects of Quantization Noise in Digital
Filters," Froc. SJCC, 1966.
3. Page Comm. Eng. , Adaptive Data Modem, RADC Final Technical Report
No. RADC -TR-69-296.
4. Kaiser, J. F, , "Some Practical Considerations in the Realization of
Linear Digital Filters," 3rd Allerton Conference, 1965.
5. Rader, C.M. , and Gold, B. , "Effects of Parameter Quantization on the
Poles of a Digital Filter, " Proc. IEEE, May 1967.
6. Viterbi, A. J, , Principles of Coherent Communication , McGraw Hill,
1966.
7. Gardner, F. M. , Phase-Lock Techniques , Wiley, 1966.
8. Larimore, W. E. , "Design and Performance of a Second Order Digital
Phase-Locked Loop," Proceedings of Symposium on Computer Process¬
ing in Communications, 1969.
9. Pitt, S.P. and Grace, O.D. , "Signal Processing by Digital Quadrature
Techniques, " DRL Report No. DRL-TR-68-39.
10. Jury, E, I. , Theory and Application of the Z-transform Method, John
Wiley, 1964.
11. Sage, Andrew P. , "Optimum System Control", Prentice-Hall, 1968.
12. VanTrees, Harry L., "Detection, Estimation, and Modulation Theory-
Part II Nonlinear Modulation Theory, " Wiley, 1971.
13. Bennett, W. R. , Stein, S. and Schwartz, M. , "Communication Systems
and Techniques, " McGraw-Hill, 1966,
14. Schwartz, Mischa, "Information Transmission, Modulation, and Noise, "
McGraw-Hill, 1970.
68
APPENDIX A
IN-PHASE AND QUADRATURE SAMPLING
69/(70 blank)
APPENDIX A
IN-PHASE AND QUADRATURE SAMPLING
A. INTRODUCTION
Quadrature sampling techniques have been discussed by Fritchman* and
by Pitt and Grace, 2 with the latter being a very detailed discussion. A dis¬
cussion of the technique itself and of the resulting errors introduced are in¬
cluded in this appendix. Also included are discussions of phase incoherent
AM, PM, and FM demodulation using quadrature components.
B. QUADRATURE SAMPLING
Let y(t) be a narrow band-pass signal modulated by a carrier f c ; 1. e. ,
y(t) = A(t) cos [2 tt £ c t + 4>(t) + 0] (1)
where $(t) represents some dynamic phase variation and 0 an arbitrary but
constant phase angle. Reexpressing y(t) as a function of the quadrature com¬
ponents results in
y(t) = u(t) cos 2 ir f c t + v(£) sin 2n f c t (2)
where;
u(t) = A(t) cos [4>(t) + 0]
v(t) = -A(t) sin [ 4>(t) +0]
Since y(t) is narrow band-pass, the frequencies are confined to the internal
fr
■w
T -
f n I S l c +
W
(4)
where f c >-—• Therefore, the frequencies of u(t) and v(t) are confined to
2
W
W
A o s
(5)
The realtionship of the quadrature components of u(t) and v(t) to the demodu¬
lated signal x(t) is a function of the type of modulation. These relationships,
known as inverse modulation techniques, for various modulation types are
shown in Table I.
71
Table I. Relations Between Quadrature Components
and Demodulated Signal x(t)
Modulation Type
Modulating Signal
AM - SS B
AM-DSB
Suppressed carrier
Injected carrier
PM
FM
x(t) = u(t)
x(t) = u(t)
x(t) = u(t)
x(t) = K -u(t)
x(t) = tan" 1 [v(t)/u(t)]
x(t) = Il tan-1 [v(t)/u(t)j
If, however, a phase incoherent scheme for demodulation is used, the
relationships become as shown in Table II.
Table II. Relations Between Quadrature Components and
Demodulated Signal x(t) for Incoherent Phase (4>o)
Modulation Type
AM-SSB
AM-DSB
Suppressed carrier
Injected carrier
PM
FM
Demodulated Signal
x(t) = \/u2(t) + v2(t)
x(t) = \/u 2 (t) + v^(t)
x(t) = v/u2(t) 4 v^(t)
x(t) = K - \/u^(t) + v^(t)
x(t) = tan" 1 [v(t)/u(t)] -
x(t) = — ^ tan -1 [v(t)/u(t)]
Obviously, if the quadrature components of a received signal are known,
the demodulation process is trivial. It is, therefore, of benefit to examine
a method for obtaining these components.
The recovery procedure is as follows. Assume y(t) is sampled at the
instants (n/fc) and (n/fc) + (l/4fc):e.g.
72
(6)
yift> = coa 2nn + v(^M sin Zvn
yifc + ifc'^'fc+i-c 1 cos l2 ’" + r>
+ v(-£- + -ri-) sin (2 to + -2.)
ic 4ic 2
= «£ + *
(7)
These sample values are the in-phase and quadrature components evaluated
at (n/f c ) and (n/f c )+( l/4f c ) respectively.
Since u(t) and v(t) have frequencies less than (W/2), Nyquist criterion is
satisfied if they are sampled at 2(W/2) or WHz, It is, therefore, unnecessary
to sample y(t) at f c Hz, but instead at WHz to recover u(t) and v(t) com¬
pletely.
To take advantage of the quadrature sampling technique, y(t) must, how¬
ever, be sampled at time instants (i/f c ) and(i/f c )+(l/4f c ) where i is any inte¬
ger. If an integer k is selected such that
then nk will be an integer. The samples y(nk/f c ) and y[ (nk/f c ) + ( 1 /4f c )], there¬
fore, satisfy the Nyquist requirements for sampling u(t) and v(t) and also
those requirements necessary for quadrature sampling. These samples are
given by
y( HL) = u( l i^
f C fc
y(
nk
4f
1 )= V (HJL +
&
(9)
and are the quadrature components. They are, however, taken at sample
times differing by (l/4f c ) seconds. To take advantage of the relations in
Tables I and II the samples must be taken at the same time. Errors are
therefore introduced; methods of handling these errors are discussed next.
C. ERROR ANALYSIS
Pitt and Grave have discussed the errors associated with quadrature
sampling very thoroughly and subsequentially define three type?' rors;
1) those due to the time difference between the quadrature compom , is, 2)
those due to imprecise sampling such as that expected from any A/D converter,
and 3) errors resulting from sampling at some rate other than (f c /k).
73
The errors of 1) are a result of making the following assumption:
-L) S v(Jjt) (10)
f c 4f c f c
The error (in percent) in making this assumption is given by:
<= | V (-J1&+ -_L) - v(-Sk) I-100 percent (11)
I fc 4fc i c 1
If v(t) is a sine wave of maximum frequency W/2, the maximum error occurs
at (nk/f c ) equal to 0,±tt, ±2tt, etc. Therefore,
‘max s lain [2tt(«- i-)| • 100
I 2 41 c I
= |sin j 1 100 percent
Letting £ = f c /W, the carrier frequency vs. bandwidth ratio, the error be¬
comes
‘max -
100 percent
The error t max as a function of £ is shown in the following:
St = 1
£ = 10
St = 100
£ = 1000
max
- max
= 70. 7%
= 7.8%
= 0. 78%
'max
e max = 0- Q?8%
This analysis is worst case since the maximum possible frequency for v(t)
was selected, and clearly indicates that the time difference error becomes
trivial for relatively large carrier versus bandwidth ratios.
The errors of type 2) have been thorougly discussed by Radar and Gold^
and Kaiser4, to name a few, and will not be included here.
Errors of type 3) result from inexact knowledge of the carrier frequency,
and therefore, incorrect sampling, This is illustrated by assuming a samp¬
ling rate of (f c /k) for a carrier of frequency (f c + Af); i. e. , the estimate of u,
u, becomes:
74
u = y(-i^) = u (-8^-) cos [2rr(f c +Af)-flJs.] +
£ c £c ic
V (Jlii) sin [2Tr(f c +Af)-2il ]
fc fc
= u(-Hii) [coe 2nnk coo _ sin 2iTnk sir. ]
f c fc fc
+ [sin 2iink cos + cos 2rrnk sin S^likAf]
f,
= u(J&) COO , 2 TI n ^f + i) sin £sSb*L
fc fc fc fc
fc
12)
The estimate of v, v, is similarly obtained and is given by:
v = y(-£ii + -i-) = - + —i—) sin|2 v (nk + ~) AL
fc 4f c fc 4fc |_ 4 fc
+ v(-£^ + -*4-) cos[27r(nk + S) Ai."l
fc 4f c |_ 4 f J
(13)
The resulting terms u and v might at first appear to be simple u(nk/f c ) and
v(nk/f c + 1 , lf c ) respectively, since Af/f c is a small quantity, This, however,
is not the ca e because the multiplier nk is linearly increasing with time.
Each estimate actually tends to move in. and out of phase with itB respective
quadrature component. These estimates u and v can, therefore, not be
expected to be the exact quadrature components as a result of the phase error.
D. AM, PM, AND FM DEMODULATION USING u AND v
The question naturally arises aB to what effect the error type 3 will have
on the demodulation schemes as defined by Tables I and II, This will now
be considered.
Non-coherent AM demodulation will be unaffected if the following holds:
JllL) + v 2 (-!^) = u 2 (.EiL) + v 2 (-E£-)
fc fc fc fc
(14)
which is eimply tho requirement that the envelopes be identical. The envel¬
opes for the estimates are obtained as folLows from Equations (12) and
. (13):
u.2{_nk) - u 2(Jtlt) cos 2 JilUliiAL + y2^_nkj sin 2 .jL U& S iS—
+ ui^Js.) v( sin
(15)
75
v 2 (_nk + _1_) - u 2 (JliL + _i_) gi n 2(lunMLf JLAL)
£c 4fc fc 4fc fc 2f c
+ v 2 ( + —i—) c o s 2 ( 2 tt n kAf tt A f )
£ c 4f c f c 2f c
. u (-SiS- + JL.) v (-nk + _JL) 3 jn(- 4 -J,nkA£ + J^L_)
f c 4£ c £ c 4£ c f c f c
Assuming -1— <<—$2 reduces to:
4f c £c
v 2 (Jlli) = u 2 {-n&) sin 2 -ZrntoL + v 2 (-ak) cos 2 2irnkAf .
. U ( nk) v (JllL) sin 4 r.P-^4.
Combining u2 and v 2 and remembering that cos 2 6 + sin 2 0 = 1 for arbitrary 0
results in:
Cr 2 (_ak) + (f2 ( nk.) = u 2 (-£&) + v 2 (-Sii)
*c *c *c
The estimates u and v can thus be used for non-coherent AM demodulation
since the envelopes have been shown to be identical.
To use u and v for PM and FM, the following conditions must hold:
PM: tan-1(4) = tan-1 (Jt)
u u
FM: -fL. tan - 1 (X-\ = —sL tan - 1 (-JW (16)
dt u dt u
Forming the ratio of v and u results in:
- u. sin SlT . nfa^ + v(-fli^) COS -2- 7ft l & r4-
Q *C fc fc fc
k u(-fifc) cos + v(-Hk) sin _2.TTn.3fAf.
Letting u(nk/f c ) = cos a, v(nk/f c ) = sino- , and £ = 2TmkAf/f c , (v/u) becomes:
v _ - cososin j+ sinqcos^
u cosacos£ + siruvsin£
sin (a-gj
cos (o--|)
= tan (<>-£,)
76
Taking the arctangent of (v/u),
tan- 1 (-£ ) = 0-4
u
and substituting for o= tan- 1 (-^) and for £,
u
tan " 1 (-£-) = tan" 1 (—SL.) - ^rnkAf, (J 8 )
u u f c
it is obvious that the condition specified in equation (16) for PM demodula¬
tion does not hold, and instead has an additive linearly increasing function of
time as an extra term. This additive term eliminates the possibility of us¬
ing quadrature samples where there is a possible frequency error for PM
demodulation unless a third order loop is used to perform the demodulation.
To check for FM demodulation, the time derivative of Equation (18) is
taken and becomes:
tan-^-jb = -d-ftan-^-g) - (19)
dt u dt I u f c Jj
The condition in Equation (19) also does not hold for FM, but the difference is
an additive constant phase rather than a ramp. The FM demodulation can
now be accomplished using a second order loop.
E. PHASE INCOHERENT RECEIVER
The underlying assumption in the analysis up to now has been that the
transmitter and receiver are in phase; i. e. , phase coherent, but incoherent
in frequency. Transmitters and receivers are generally frequency locked
but incoherent in phase. The estimates u and v for an arbitrary but constant
phase shift 6 , corresponding to a phase incoherent system, are:
u (~^) = u(-~) cos 0 + v[^~) sin0
fc *c f c
v(<U^) = -u(-Ht) sin0 + v(H^-) co s 6
fc ^c
( 20 )
Using the same method as in Equation (15) and after making the assumption
that l/4f c << k/f c results in:
(i 2 (-!lK) + ^(Jlk) = u 2 (JiK) + v 2 (-£ii)
f f f f
r* r> x r>
and thus indicates equivalence of the envelopes. To determine equivalence
of the conditions specified in Table II for PM and FM, the steps resulting
in Equations (17), (18), and (19) are followed with these results obtained:
(21)
tan*l(-rO = tan"M~) - e
u u
—tan-l(— X-) = tan*' ( —)
dt u dt u
These favorable results indicate that quadrature sampling techniques are also
well suited to phase incoherent receivers.
REFERENCES
1. B, Fritchman, C. Gumacos, A. Wright, and T. Hornsby, Digital
Equivalent Transceivers Study, Final Report No, RADC-TR-68-539.
2. S P. Pitt and O. D. Grace, Signal Processing by Digital Quadrature
Techniques, FinaL Report No. DRL-TR-68-39.
3. C, M, Rader and B. Gold, "Effects of Quantization Noise in Digital
Filters", Proc. SJCC, 1966.
4. J. F. KaiBer, "Some Practical Considerations in the Realization of
Linear Digital Filters", 3rd Allerton Conference, 1965.
78
APPENDIX B
A NONLINEAR DIGITAL PROCESSOR FOR FM DEMODULATION
79/(80 blank)
ABSTRACT
A recursive estimator is derived that will optimally estimate the message
of a noisy sampled FM process. The incoming analog FM process is in-
phase and quadrature sampled to reduce the bandpass RF waveforms to a
sampled baseband process. It is shown that the angle process can be modeled
as a discrete linear filter amenable to state variable description. The maxi¬
mum a posteriori (MAP) criterion is used to develop a recursive cost func¬
tion. Minimization techniques used in optimal control theory are employed
to derive the two-point boundary-value (TPBV) problem from this cost func¬
tion. Discrete invariant imbedding techniques are then used to solve the TPBV
problem and obtain the recursive solution. A single-pole message filter ex¬
ample is reviewed, where computer simulations indicate threshold extension
of approximately 6 dB above the conventional discriminator. An above-thresh¬
old-linear model is also discussed.
81/(82 blank)
APPENDIX B
A NONLINEAR DIGITAL PROCESSOR FOR FM DEMODULATION
A. INTRODUCTION
Threshold extension for FM demodulators has been an active area of in¬
vestigation for the past 20 years. Numerous demodulator configurations
have been developed that achieve better threshold performance than the fun¬
damental (conventional) descriminator. Such descriptors as FM with feed¬
back 1 (FMFB), phase-locked loop demodulators (FMPLL), extended range
phase-locked loop demodulator (ERPLL), etc. , have been used in the analog
world to describe low-threshold FM demodulators. At high signal-to-noiac
(SNR) above threshold the demodulators have almost identical performance in
that they provide a linear (in DB) relationship between output SNR and input
carrier-to-noise (CNR) ratio. As the CNR decreases, the threshold phe¬
nomenon is encountered which results in a drastic decrease in output SNR
for a small decrease in CNR; the purpose of the threshold extension FM de¬
modulator is then to lower this critical CNR where threshold occurs and thus
extend the operating range of the radio link. As is usually the case, the
better the threshold performance of a demodulator the more complex the cir¬
cuit configuration becomes.
A stored or wired program digitalized FM demodulator can do a simple
or a very complex demodulation algorithm while using the same basic cir¬
cuit configuration; the operations per second may change, but not the network
configuration. The objective of this paper is to present the synthesis and
evaluation of a digitalized FM demodulator obtained by employing the principles
of Bayesian estimation theory coupled with optimal control minimization
techniques. The demodulator is necessarily a threshold extension demodu¬
lator since it is synthesized to provide near optimum estimation of the mes¬
sage in the presence of noise. Some optimum estimators only provide bounds
and are not feasible to implement. In this synthesis scheme, however, a
recursive estimation or filtering solution is derived which calculates the best
estimate as each data word arrives. Accordingly, the configuration becomes
a recursive digital feedback filter which also has time varying gain,
First to be discussed, is in-phase and quadrature sampling and how i; i.s
related to sampling FM carrier processes, it is shown that this .jar.uTing
technique permits baseband samples to be obtained directly from the received
carrier or IF signal, Next, the modulator is characterized by u coniiiijous-
time state variable model. This model is then transformed u. a discrete state
variable modulator model which is used to derive the general i e<-u "s ive so¬
lution algorithm. Both Bayesian estimation theory and optimum control
theory are employed to develop the solution. After this, a real; r. n of the
algorithm is discussed where the message spectrum is charac.el . / l a a
single-pole filter. This configuration wao simulated and L sled for a smuvave
83
modulating signal and signal-to-noise performance curves obtain from this
simulation are presented. The demodulator exhibits threshold extension
capability of approximately 6 db better than the conventional discriminator
demodulator. Better threshold performance is predicted for more complex
message filters. The form of the demodulator resembles a phase-locked-
loop demodulator with a time-varying gain processor. It is shown that these
time-varying gain elements approach steady state values for above-threshold
operation of the demodulator, hence, linearization of the demodulator is
possible. Finally, characteristics of the linear model are discussed.
B. IN-PHASE AND QUADRATURE SAMPLING OF AN FM PROCESS
The fundamental equation for the output s(t) of a frequency modulated
waveform is:
s(t) = v/Zacos [>f 0 t + e (t)J (1)
where v2a is the amplitude, f 0 is the carrier frequency, and 6(t) is the angle
modulated process which for FM is given by:
t
0 (t) = c
to
In this expression for 6(t), the modulating waveform is x(t) and c is the so-
called frequency deviation. Simple trigonometric identities permit s(t) of
Equation (1) to be rewritten in a convenient form for explaining in-phase and
quadrature sampling
a(t) = \/ia Jcos(2iTf Q t) cos8(t)-sin(Zwf 0 t) s in©(t7| (3)
Suppose that s(t) is a bandpass process with bandwidth W and let s(t) be
sampled at t = kI/f Q , where f 0 is the carrier frequency, k is the sample time
index, and I is an integer such that I £ f Q /W, then it can be 9howu*that
s(kl/f 0 ) = /2acose(kI/f 0 ) (4)
which is called the in-phase sample. Similiarly, if s(t) is sampled at 1 /4f 0
seconds later, i. e. , t = (kl/f 0 + l/4f 0 ); then,
s(kl/f 0 + l/4f 0 ) = - /2asine<kl/f 0 + l/4f 0 ) (5)
/
x(u)du
( 2 )
*See Appendix A for a more detailed discussion of in-phase and quadrature
sampling.
84
This is called the quadrature sample. Usually, f Q << 1, then,
0(kl/f o + l/4f 0 ) = 0(kl/f 0 )
(6)
and the bandpass process is reduced to a baseband process by an appropriate
sampling technique. Since two samples are necessary to describe the base¬
band sample, a vector description becomes a natural representation, i. e,,
(7)
where T, the sample interval, is T = I/f Q .
When the FM process of equation (1) is passed through a noisy channel
the observed in-phase and quadrature sample vector Z(k) will consist of the
signal sample vector as well as in-phase and quadrature noise vector.
Z(k)
h(k) + N(k)
( 8 )
A block diagram description of this concept is illustrated in Figure 1 where
the message x(t) is generated by passing a random process u(t) through a
SlNWgt
s(t)
A,.
X<t) MESSAGE
ESTIMATE
Figure 1. Block Diagram for Modulator and Demodulator
for an FM Process
85
linear filler. The ultimate purpose of this configuration is to use the in-
phase and quadrature samples (z^, z%) to generate an estim le x(t) of the
message x(t).
The bandpass FM process illustrated in Figure 1 can be reduced to an
equivalent baseband process of Figure 2 when in-phase and quadrature sam¬
pling is used. In this baseband equivalent configuration, a dc term, 2irAf, is
added to the output of the linear message filter. This term represents the
unavoidable frequency uncertainly that exist between the transmitter and re¬
ceiver trequencies for the typical FM link. This frequency uncertainty will be
reflected in the observed samples at the receiver, and its removal becomes
part of the estimator's task. In this situation, the output of the modulation
integrator 0(t) is represented by:
t
0 ( t ) = f cx(u)du + ZrAft + 6(0). (9)
b
C. STATE VARIABLE MODEL
In recursive estimation, it is usually desirable to model linear filters
by the state variable technique. A simple example will illustrate this con¬
cept.
CHANNEL DEM0D ULATOR
Figure ?.. Block Diagram for Equivalent Baseband FM Process
86
Suppose that the filter is a simple single-pole filter described by the
differential equation:
x(t) = - cvx(t) + cvv(t) (10
If the output of the integrator of Figure 2 is 6(t), then its input is G(t) given
by:
6 (t) = cx(t) + U£(t) (II)
where U 2 <t) represents the frequency uncertainity. To construct a vector
state equation of the process shown in Figure 2 (up to the sine and cosine
functions), combine equation (10) and equation (11) as a vector equation:
where uj(t) = ov(t). In the vector notation, this becomes:
Y(t) = AY(t) + U(t)
( 12 )
where the 2x2 matrix A is sometimes referred to as the system matrix.
The reduction of the modulator configuration to state variable characteri¬
zation can readily be visulized in Figure 3, Figure 4, and Figure 5, The re¬
duction of an RC single-pole filter to its state variable equivalent is shown in
Figure 3 where the filters output is x(t). Figure 4 illustrates the modulator
and Figure 5 shows the overall filter modulator configuration.
SINGLE POLE FILTER
Figure 3. Single Pole Message Model
87
U 2
<t)
FREQUENCY UNCERTAINTY
U 2 (t) - 2TTAF
Figure 4. Model for FM
Generalization to a higher order filter is straightforward: For example,
Figure 6 illustrates an (N-l) pole filter configuration where the matrix A is
the (N-l) x (N-l) system matrix. Techniques are available- 3 for transferring
a general filter transfer function given in the S-plane to the corresponding A
matrix for the state variable representation. In a manner similar to the
single-pole filter example just discussed, the differential equation
N-l
0(t) = £ CiXi(t) + u N (t) (14)
i = l
describing the input to the integrator can be appendaged to the (N-l) filter
state equations to obtain an (Nxl) vector representation as shown:
ijd)
•
a ll a l2 • • * a l, N-l 0
a 21
•
x x (t)
•
x N-l (t)
0 (t)
•
a N-1, 1
cj C 2 ... <=N-1 0
x N _i(t)
0 (t)
u L (t)
u 2 (t)
u N (t)
(15)
88
u ( (t) - av(t)
Figure 5
|
[
i‘
i 1
I
CN— 1 )
* u 2 (t)
(mv\ (-a °\/x(t)\ + /u,(t)\
\0<t)/ \ c nj ^0<t)/ \ u 2 ( t)/
2X1 VECTOR Y<t) = A^ft) +U(t)
SCALER 9(1:) “ r T Y(t)l TTm (0,1 )
. Continuous State Variable Representation of FM Process
POLE FILTER
| cos( )
-*
m
^ i
COS W 0 t
In vector notation, negation (15) becomes;
Y (t) = GY(t) + U (t) (16)
where the new G matrix is an (NxN) matrix whose elements are the (N-l) x
(N-l) "A" matrix with another row and column added. For this new aug¬
mented system, the scalar input to the integrator is:
8(t) = r T Y(t) (17)
where F is a (Nxl) vector given by:
r T = (0, 0, . . . , 0, 1) (18)
The FM output equation is now written as:
s(t) = \fl?. cos [ w Q t + 0(t)] (19)
where 0(t), the angle modulation, is:
0 (t) = r T Y(t) + 0(0) (20)
D. DISCRETE STATE VARIABLE REPRESENTATION
Since we desire to do the estimation by digital techniques, it is advanta¬
geous to convert the message model into a discrete state variable represen¬
tation. One method for doing this is to convert the vector differential equa¬
tion, equation ( 16 ), into a difference equation. For example,
Y(t) = Um [^.H) - Y(k)] k = t
T-> 0 L T J k+1 = t+T
Thus, an approximation of equation (16), with I the NxN identity matrix, be¬
comes
Y(k+1) = [I + TG] Y'k) f TU(k) (22)
However, for high accuracy the sample rate must be rather fast. A better
technique is to use the transition matrix or recursive equation from the sampled
solution of the continuous time representation _Y(t), This idea will now be
illustrated.
The solution to equation (16) can be shown^ to be
Y(t) = «(t, t 0 )Y(t 0 ) + / ®(t, T)U(r)dr (2 1)
90
where 4 , (t, r ) is the system transition matrix. A Taylor series expansion
of the integral of equation (22) about t Q results in:
Y(t) = *(t, t 0 )Y(t 0 ) + (t - t Q )U(t 0 ) + R 2 (24)
where R.£ is the remaining terms. Suppose that the system is linear time-
invariant, then the transition matrix is the exponential matrix:
*(t, t 0 ) - e " t 0 ) (25)
which has a series form:
<t> (t, to) = I + (t - to)G + ^ ‘ , tQ > G 2 + ... (26)
Let the terms after the linear term be represented by Rj> such that
*(t, t Q ) = I + (t - t 0 )G + R*> (27)
When we let t = (k+l)T and t G = kT, then t - t Q = T, so that the exact sampled
equation for Y.(t) is obtained by combining equation (24) and equation (27).
Letting kT ^ k, the discrete representation of equation (23) becomes:
Y(k+1) = (I + TG)Y(k) + TU (k) + RJ, Y(k) + R 2 (28)
The first two terms in equation (28) represent the difference equation approxi
mation which has error proportional to both R 2 and Rj and the first three
terms represent the Taylor series approximation which has its error pro¬
portional only to R£. Accordingly, the use of the sampled transition matrix
4>(t, to) provides a better discrete approximation to the continuous case than
does the direct difference equation.
For a linear time invariant system the sampled transmition matrix de¬
pends only upon the sample interval T, i. e.,
#{t, t Q ) = e GT = $ ; T = t - t Q (29)
For the (2x2) A matrix of equation (12), this transition matrix has the form:
4 > =
■oT
c,, -ciT.
CL ( 1 ”® ) 1
91
The recursive discrete equation is, from equation (24), after appropriate
substitution:
Y(k+i) = *Y(k) + W(k) (30)
where W(k) = Tu(kT) and Y(k+1) = Y[(k+1)T]
This discrete modulation process with in-phase and quadrature noise
terms added is illustrated in Figure 7. The observed process Z(k) is re¬
presented by:
Z(k) = h[0(k)] + N(k) (31)
where:
h T ( ) = |h 1 ( ), h 2 ( )\
h^ ( ) = cos 0(k)
h ( ) = - v/^a sin 6(k)
u
The discrete phase variable 0(k) is given by:
6{k) = r T Y(k) (32)
We have now defined the discrete FM process in a form convenient for
application of recursive estimation methods. This development will be dis¬
cussed next.
E. RECURSIVE ESTIMATION
The methodology used in recursive estimation is to first specify an esti¬
mation criterion along with the probability density functions associated with
the random variables of the process. These probability density functions are
then used in the equation for the estimation criterion to derive a cost function.
Finally, the recursive estimation equations are obtained by minimizing the
cost function in a recursive manner subject to the systems difference equa¬
tion. We will use the maximum a posteriori (MAP) criterion in our deriva¬
tion which follows that given by Sage^ and McBride
We assume a vector message and observation model:
Y(k+1) = $Y(k) + W (k) (33)
Z(k) = h[0(k)] + N(k), 9(k) = r T Y(k) (34)
92
where Y(k) is an N dimensional state vector, Z(k) is an M dimensional obser¬
vation vector, W<k) is a N dimensional message vector and N(k) is an M dimen¬
sional noise vector. W(k) and N(k) are assumed to be Gauss Markov white
sequences with:
cov {W(k), W(j)} = Q 6 (k-j); E {w(k)} =0
(35)
cov{N(k), N(j)} = R6(k-j); E |N(k) } =0
(36)
cov{N(k), W(j)[ = 0
(37)
var {Y(k 0 )| = P(0); E {Y(k 0 )[ = Y(k 0 )
(38)
As usual for discrete problems 6(k-j) is the Kronecker delta. Consider the
problem of estimating Y(k 0 ), Y(ki),... Y(kf) having been given the observa¬
tion sequence Z(k 0 ), Z(ki), ,.. , Z(kf), It can be shown that the MAP criterion
is equivalent to finding a sequence Y(k 0 ), .... Y(kf) that maximizes.
p[Z(k Q ).Z(kf)/Y(k : ,).Y(kf)] p [Y(k Q ), .... Y(kf)] (39)
where p() represents the associated probability density functions. Under
the assumptions previously outlined, it is straighforward to show^ that
equation (39) reduces to minimization of a scalar J given by
J = 1/2 [Y(k 0 )-7(k 0 )l T P _1 (0) fY(k 0 )-Y(k 0 )] + 1
k f-^l
R _1 [Z(k) - h()l + 1/2 W^k) Q' 1 W(k)
k=k 0
rz(k) - hoiT
(40)
subject to the equality constraint Y(k+1) = $Y(k) + W(k), and the associated
initial conditions. When we let the summation of Z(k) - h[ 0(k)] stop at kf-1
by writing this term as Z(k+1) - h[8 (k+1)], the individual summation terms
can be included under the same summation, i. e. ,
J = 1/2 rY(k o )-Y<k o )] T P -1 (0) [Y(k c )-Y(k Q )]
k
+ 1
n V |[rz(fcfl) - h [6(k+l]j T R “ 1 [z< k+ 1 ) - h re (k+l]J
k=k Q ^
1 W (k) |
(41)
+ W T (k) Q "
93
e 7. Block Diagram of the Message Process Illustrating Discrete State Variable
Characterization of the Angle 6(k)
The minimization of this scalar J is a typical optimal control problem.
An equivalent minimization problem has been solved by Sage^ where he
used the minimization techniques of optimal control theory to define the two-
point boundary-value problem - a set of vector difference equations which
are to be solved simultaneously to obtain the recursive estimation equations.
Unfortunately, the resulting set of vector difference equations are not only
nonlinear, but al3o have missing boundary conditions. However, an approxi¬
mate solution technique called discrete invariant imbedding can be used to
overcome this difficulty. Here, we will only state the solution. Interested
readers are referred to Sage^.
The resulting difference equations that define the two-point boundary-
value problem are:
Y(k+1) = $ Y(k) - Q $ “ T X (k) (42)
\(k+i) = r R' 1 jz(k+l) - h [6(k+l)]| + * ' T x(k) (43)
where:
0 = r T [*Y(k) - q$~ t x(k>]
| (1 X M)
r T * (o. o, .... 0, 1)
$ = (NxN) system transition matrix
\(k) = (Nxl) adjoint vector
Z(k) = (Mxl) observation vector
The boundary conditions are:
X(k c ) = P-^OJJYOco) - Y(k 0 )j
(44)
X(k f ) = 0
(45)
and Y(kf) is the missing terminal condition.
To obtain the recursive solution algorithm this set of coupled nonlinear
vector difference equation must be solved. An exact solution technique is
formidable; however, a solution technique called discrete invariant embedd¬
ing^ can be employed to obtain an approximate recursive solution.
3 h^( ) ( 3hl 3 hm
3 6 " = I 36 ’ •*” 30
95
The solution algorithm is an Nxl vector difference equation coupled with
an (NxN) matrix difference equation. The matrix equation is sometimes
called the gain matrix equations. The general solution algorithm* is:
A
Y k+1 =
4> V + P
k k+1
r [ v e- T( V’] R ‘‘ [ z k +1 ' «v] < 46 >
P k+1
£ « P k + Q 4?" 1
|t T t r[p 6 h T (6 k ,]R-‘[r 6 h(0 k ,]r T
*
r -T‘
<b P, + Q4>
k
- r [ z k« -fc(v] TR ' T [’ 6 2 av] rT (47)
.[,p k + Q .-*]
The following expressions
sampling, i. e., M = 2.
are valid when using in-phase and quadrature
z T
k+1
= (k+1). z 2 (k+1)} = {z r z 2 }
h T (&k)
= \fz a | cos
V - sln6 k}
VhT(0 k )
= yfl a| -ein@ k . -cos§ k }
V 2 h T $ k )
= ^2a | -cos0 k , sin@ k }
When these are substituted into equations (46) and (47) and assuming R
(l/<rjj)I,
(49)
(50)
z, cob (3. - z_sin§,
1 k 2 k
*To simplify notation the subscript k is sometimes vised instead of using (k)
in the argument.
9b
A A rp
The estimate 0(k) o£ the angle is 0(k) = P 1 Y(k). The parameters of the
equations are defined as follows:
$ = NxN system transition matrix
a = rms carrier voltage
2
cr = noise power in the input bandwidth
r T = (o, o.. o, i)
= NxN gain matrix
Q = NxN covariance matrix of the modulating message source
Next, a simple example using a single-pole message filter model will be re¬
viewed.
F. EXA MPLE
For a single-pole message model, the parameters of the recursive al¬
gorithm, equations (49) and (50), are:
Y T (k) = (x(k), 0(k))
c = Frequency deviation
a = 3 dB frequency of the filter
T = sample interval
2
a
2
cr
n
input carrier-to-noise ratio
The x(k) element of Y(k) is the estimate of the message that is sought. In
the Q matrix, <Jq is the variance of the message filter input, uj (t),and <>2 is
the variance of the frequency uncertainity (2iTAf) where for convenience Af
is assumed to be a Gauss-Markov white sequence. The part of the last as¬
sumption pertaining to the white sequence is difficult to justify; however,
when crystal controlled frequencies are used <r £ is quite small compared to
<r 2 and the degradation is most likely insignificant*.
A realization of these estimation equations is illustrated in Figure 8.^ In
the absence of noise, the input to the fixed gain is sin (0^ - e^) « 0^ - 0^.
Under the same input situation, the input to the nonlinear time-varying gain
processor is cos (0^ - e^)* It is clear that the form of the demodulator re¬
sembles a PLL demodulator where the loop filter and the digitized VCO (di¬
gital oscillator) constitute the other elements of the loop. The main departure
from the phase-locked loop demodulator is the time-varying gain processor;
the algorithm for this processor is defined by equation (BO).
The gain term Gj^ is given by:
G, = v/2a/<r 2 (52)
1 v n
9
where o-q is the noise power, defined in the input IF bandwidth, and "a" is
the rms carrier voltage. It is interesting to note that the input to the time-
varying gain processor is the quadrature phase component which is often used
for automatic gain control (AGC) in phase-locked loop receivers. This might
be the reason that matching G^ to the input carrier and noise power was not
too critical as far as the demodulator performance was concerned. This fact
was discovered during the simulation of the demodulator.
The simulation of the demodulator of Figure 8 was accomplished using
digital computer simulation techniques. Of particular importance in deter¬
mining the performance of FM demodulators are curves relating to the out¬
put signal-to-noise ratio in the message bandwidth (SNR) to the carrier-to-
noise ratio in the IF bandwidth** (CNRjp). Consequently, the ultimated pur¬
pose of the simulation was to obtain these SNR performance curves; Figure
9 illustrates the SNR performance curves obtained by simulation of the single¬
pole message filter example of Figure 8.
In these curves P, the modulation index, is defined as:
P = § (53)
where c is the radian frequency deviation and a is the ? db bandwidth of the
single-pole filter. Curve A is the SNR performance curve for the demodu¬
lator for (3= 5 and fixed gain G l matched to CNR = 20 dB. Both curves were
obtained for a sinewave test signal of normalized frequency (1/50) T where T
*In all simulation tests, crp = 0.
v *In the simulations, the Carson rule bandwidth was used.
98
DIGITAL PROCESSING-—- ANALOG
UOOP FILTER
Figure 11. Small Signal Linear Approximation of Demodulator
A(Z)
x>
The block diagram of Figure 12 is further reduced to the diagram of Figure
13, where:
/
/
/ The t:
A(z)
" H1.I * 12 + P 22
(55)
B(z)
z
z - 1
(56)
H(z)
P 1?. Z
(57)
' z -*n
Figure 13. Reduced Block Diagram
isfer function y/0 is, from Figure 13, given by:
y/0 ■ G 1
1 + B(z)A(z)G 1
(58)
The desired transfer function x/0 is derived from equation (58) using the re¬
sults of equation 54. We have
x/0
H(z) G 1
1 + B(z)A(a)G
(59)
'Ml
substituting in the values of H(z), B(z) and A(z) defined in equations (55)
through equation (57), the desired transfer function x/b becomes
G 1 P 12 Z
x/0
11
1 +
p G z
F 22 1
z - 1
-)(:
l r l2 T 12 'z - <t> ■ z
( 60 )
104
This is the Z-transform transfer function of the above-threshold approxi¬
mation of the demodulator. The noise bandwidth can be obtained directly
from equation (60) by a technique discussed by Gupta’'’. Here, however, it is
more convenient to first obtain the S-transform (Laplace transform) of the
transfer function, and then obtain the noise bandwidth from the S-transform
transfer function^
The S-transform transfer function is obtained from the Z-transform by
first making an intermediate transformation to the zeta-trar.sform. This
transformation technique is discussed by Gupta® and proper application of hie
technique permits equation (60) to be written as:
Sill
6<s)
h(s)
G lPl2 8
■ + ■<« + G lP22 ) + G l( p u PO+ p 22 )
( 61 )
The poles of h(s) are:
s = -A ± jB
(62)
where:
A = + G 1 P 22
2
B
12
Po +
a
i-
* G 1 P 22 ,2
2 ’
For white noise input of spectral density Nq/ 2, the equivalent noise
power, P^, out of the demodulator model is:
_1_
2tt
(63)
where h(ju) is defined by using equation (61). This integral can be evaluated
by using complex variables integration techniques. The result is:
where K 0 = Gipi2 and A is defined in equation (62), The loop noise band¬
width, 2B^j, is obtained from the following relationship:
(2B n> (65)
105
Solving for 2B^, we have:
_ 2
G i P 12
2
Ho, Gl p 22 )
( 66 )
We see that the loop noise bandwidth is a function of a, Gj, pi2» and P22* To
investigate how the noise bandwidth varies we need the steady state values of
Pl2 and P22*
Some approximate values for the steady state gain terms have been ob¬
tained by computer simulation of the demodulator for a sine wave input test
signal. Curves showing P-matrix gain versus carrier-to-noise ratio in the
IF bandwidth (CNRjp) for each of the four gain terms are sketched in Figure
14; a, b, and c. Two types of curves were obtained for each P-matrix gain:
curves for variable Gj, i. e, , Gj is matched to each new input CNRjp and
curves for fixed Gj set at CNRjp = 20 dB. Notice that the variable Gj and
fixed Gj (at CNRjp = 20 dB) for P = 5 approximately intersect at CNRjp = 20
dB. These steady state values were obtained after a 500 point run and are
representative of data taken on numerous different runs.
Figure 15 is a sketch of the real part A and imaginary part B of the
linearized demodulator poles as they vary with input CNRjp In these curves,
It
N . 07
ft.
a:
5 .06
P
?
* .06
* .06
20
CN* (DB)
Figure 14a. Variation of Steady State Gains for Fixed
and Variable Gi and (3 = 1 and p=5
106
STEADY STATE GAIN P
Figure 14b, Variation of Steady State Gains for Fixed
and Variable Gj and (3 = 1 and (3=5
CNR 1F (DB)
Figure 14c. Variation of Steady State Gains for Fixed
and Variable G^ and p=l and p=5
107
f
Figure 15. Two-Sided Loop Noise Bandwidth, and Demodulator Pole
(s = -A ± jB) Location as Function of Input CNRjp
the gain is variable and matched to each new input CNRjp. Also sketched
in Figure 15 is the loop nosie bandwidth that is obtained from equation (66).
The noise bandwidth increasing with increased CNRjp indicates that as the
CNRjf increase, the apparent bandwidth of the linearized demodulator opens
to better accommodate the signal.
The spectrum of the demodulator transfer function is sketched in Figure
16. For low frequencies, w < | A-B| , the logarithmitic plot indicates a
parabolic frequency characteristic. This is similar to spectrum charac-
acteristics associated with conventional discriminators. The upper cut-off
108
Figure 16. Above Threshold Spectrum of the Demodulator
frequency, w = | A + b| , is also similar to that provided by the low-pass filter
in the discriminator demodulator. Figure 17 is a sketch illustrating how the
3 dB bandwidth of the demodulator varies with input CNRjp.
H. CONCLUSION
The recursive nonlinear demodulator has been shown by simulation tech¬
niques to perform satisfactory; it appears to provide threshold extension ca¬
pability beyond that of the discriminator of about 6 dB for single-pole message
characterization. The above-threshold steady state performance is .similar to
that obtainable using phase-locked-loop demodulators. An integral part of the
demodulator is the time-varying gain processor. During acquisition these gain
terms tend to widen the apparent* bandwidth of the demodulator. Once the sig¬
nal is acquired, the bandwidth is authoma tic ally narrowed.
Obviously, more work is required to reduce the algorithm to a practical
digitalized demodulator. However, the work presented here is the necessary
first step in applying modern estimation theory and control theory to the prob¬
lem of optimum digitalization of communication equipment. To the author's
knowledge, this is the first realization of an optimum digitalized FM demodu¬
lator.
^Apparent bandwidth is used here since bandwidth is rather meaningless in
nonlinear processors.
109
(CNR )DB
W/q,
J-1_I_ i _I_I
1.0 2.0 3.0 4.0 5.0
RADIAN/SEC
Figure 17. Above-Threshold 3 dB Bandwidth of the Demodulator
110
REFERENCES
1. Schwartz, M. , Bennett, W. , and Stein, S., "Communication Systems
and Techniques", McGraw-Hill, 1966.
2. Pitt, S. P. and Grace, O. D. , "Signal Processing by Digital Quadrature
Techniques" Final Report No. DRL-RT-6839 Naval Ship Systems Com¬
mand Contract No. N00024-68-C- 11.17.
3. Athans, M. , and Falb, P. , "Optimal Control; An Introduction to the
Theory and Its Applications, " McGraw, 1966.
4. Sage, Andrew P. , "Optimum Systems Control, " Prentice-Hall, Inc.,
1968.
5. McBride, Alan L., "An Estimation Theory Approach to Bit Synchroni¬
zation", National American Astronautical Society Meeting Record 1969_.
6. Van Trees, Harry L., "Part II, Nonlinear Modulation Theory -- De¬
tection, Estimation, and Modulation Theory", Wiley, 1971.
7. Gupta, S. , "On Optimum Digital Phase-Locked Loops", IEEE Trans¬
lations on Communication Technology , COM-16 pp. 340-344, April 1968.
8. Gupta, S. , "Transform and State Variable Methods in Linear Systems",
Wiley, 1966.
Ill
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